Chip-scale infrared emitter package

A chip-scale infrared emitter package comprising:

• an emitter chip including
• a base having a silicon substrate, top and bottom surfaces, and a central cavity extending through said top surface and into said silicon substrate, said top and bottom surfaces being opposite to each other in a vertical direction, a membrane aligned with said central cavity in the vertical direction and having top and bottom surfaces and a peripheral end, said peripheral end being isolated from a periphery of said central cavity by a loop-shaped gap,
• an electric resistor formed on said top surface of said membrane for heating said membrane for generating infrared radiation,
• at least one slim supporting beam extending from said peripheral end of said membrane through said loop-shaped gap to said base so as to suspend said membrane in said central cavity, said slim supporting beam being reduced in dimensions from said peripheral end of said membrane so as to form a thermal bottleneck to heat conduction from said membrane to said slim supporting beam, and
• a first reflective material coated on said bottom surface of said membrane;
• and
• an enclosure having a can housing and a transparent window plate, said can housing defining a window opening, said window plate covering sealingly said window opening and cooperating with said can housing to define an enclosed vacuum chamber which is in fluid communication with said central cavity, said emitter chip being mounted in said enclosed vacuum chamber for emitting the infrared radiation through said window plate;
• wherein said enclosed vacuum chamber has a pressure less than 0.01 torr.