Wiring substrate, semiconductor device, and method for manufacturing wiring substrate
AssigneeShinko Electric Industries Co., Ltd.
InventorsShigetsugu Muramatsu, Satoshi Sunohara
Life of this patent
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Abstract
A wiring substrate includes a wiring pattern, which includes an upper surface forming a desired recognition mark, and a solder resist layer, which covers the wiring pattern. The solder resist layer includes a recess that entirely exposes the upper surface of the wiring pattern. The solder resist layer includes a solder resist layer formed at a region corresponding to the recess and a solder resist layer formed outside the recess. The recess entirely exposes the upper surface of the wiring pattern as the recognition mark, and the solder resist layer is formed at portions outside the upper surface of the wiring pattern.
Claims13
A wiring substrate comprising:
- a substrate body;
- an uppermost layer wiring formed on the substrate body and including a first wiring layer part, wherein the first wiring layer part is independently formed on the substrate body and includes an upper surface and a side wall, the upper surface forming a recognition mark;
- and
- an insulation layer formed on the substrate body and the uppermost layer wiring, wherein the insulation layer includes a recess which entirely exposes the upper surface of the first wiring layer part, wherein the insulation layer further includes a lower side wall and an upper side wall, the lower side wall being adjacent to the side wall of the first wiring layer part and surrounding the side wall of the first wiring layer part, and the upper side wall forming a part of the recess, and wherein the recess includes a bottom surface that is larger than the upper surface of the first wiring layer part, wherein the bottom surface of the recess includes a curved portion curved in a concaved manner from an edge of the recognition mark to the upper side wall of the insulation layer.
A method for manufacturing a wiring substrate the method comprising:
- preparing a substrate body;
- forming uppermost layer wiring, which includes a first wiring layer part including an upper surface that forms a recognition mark, on the substrate body;
- forming an insulation layer on the substrate body and the first wiring layer part;
- and
- forming a recess that entirely exposes the upper surface of the first wiring layer part, which forms the recognition mark, from the insulation layer by partially reducing thickness of the insulation layer at a region that corresponds to and is larger than the upper surface of the first wiring layer part, wherein the forming the recess includes forming a bottom surface of the recess, the bottom surface including a curved portion curved in a concaved manner from an edge of the recognition mark to an upper side wall of the insulation layer.
Dependencies are inferred from the claim text.