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US 8,574,995 B2Granted
Source/drain doping method in 3D devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorPei-Ren Jeng
Life of this patent
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Abstract
The present disclosure provides methods of semiconductor device fabrication for 3D devices. One method includes provide a substrate having a recess and forming a doping layer on the substrate and in the recess. The substrate is then annealed. The annealing drives dopants of a first type from the doping layer into the substrate. This can form a doped region that may be the source/drain extension of the 3D device. An epitaxial region is then grown in the recess. The epitaxial region can form the source/drain region of the 3D device.
Claims20
A method, comprising:
- provide a substrate having a first recess formed in a first surface;
- depositing a first doping layer on and over the first surface of the substrate including on sidewalls of the first recess;
- annealing the substrate and first doping layer, wherein the annealing drives dopants of a first type from the first doping layer into the sidewalls of the first recess thereby providing a doped region of the substrate;
- and
- after annealing the substrate and first doping layer, growing an epitaxial region on the doped region of the substrate and in the first recess wherein the annealing drives dopants of a first type from the first doping layer through the sidewalls of the first recess to form a first doped region of the semiconductor substrate:
- forming a second doping layer on sidewalls of a second recess formed in the semiconductor substrate;
- and after forming the second doping layer, annealing the semiconductor substrate and second doping layer, wherein the annealing drives dopants of a second type, opposite the first type, from the second doping layer through the sidewalls of the second recess to form a second doped region of the semiconductor substrate.
4 more elements
A method, comprising:
- providing a semiconductor substrate having a first region having a first fin and a first gate structure formed on the first fin and a second region having a second fin and a second gate structure formed on the second fin;
- forming a first doping layer on sidewalls of a first recess formed in the first region of the semiconductor substrate, wherein the first recess is adjacent the first gate structure;
- after forming the first doping layer, annealing the semiconductor substrate and first doping layer, wherein the annealing drives dopants of a first type from the first doping layer into the first fin through the sidewalls of the first recess to form a first doped region of the semiconductor substrate;
- forming a second doping layer on sidewalls of a second recess formed in the second region of the semiconductor substrate, wherein the second recess is adjacent the second gate structure;
- and
- after forming the second doping layer, annealing the semiconductor substrate and second doping layer, wherein the annealing drives dopants of a second type, opposite the first type, from the second doping layer into the second fin through the sidewalls of the second recess to form a second doped region of the semiconductor substrate.
3 more elements
A method of fabricating a 3D semiconductor device, comprising:
- provide a substrate having a first fin, a first gate structure of a first transistor disposed on the first fin, and a first recess adjacent the first gate structure a second fin, a second gate structure of a second transistor disposed on the second fin, and a second recess adjacent the second gate structure;
- forming a first doping layer on the first gate structure and in the first recess;
- annealing the substrate and first doping layer, wherein the annealing drives dopants from the first doping layer into the substrate to form a first doped region, wherein the first doped region provides a source/drain extension region for the first transistor;
- and
- growing an epitaxial region in the first recess on the first doped region, wherein the epitaxial region provides a source/drain region for the first transistor forming a second doping layer on the second gate structure and in the second recess;
- and after forming the second doping layer, annealing the semiconductor substrate and second doping layer, wherein the annealing drives dopants of a second type, opposite the first type, from the second doping layer into the second fin through sidewalls of the second recess to form a second doped region of the semiconductor substrate.
3 more elements
Dependencies are inferred from the claim text.