CMOS with channel P-FinFET and channel N-FinFET having different crystalline orientations and parallel fins
AssigneeInternational Business Machines Corporation
InventorsGuy M. Cohen, Katherine L. Saenger
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AssigneeInternational Business Machines Corporation
InventorsGuy M. Cohen, Katherine L. Saenger
Estimating the term…
An integrated circuit fabrication apparatus is configured to fabricate an integrated circuit with at least one p-FinFET device and at least one n-FinFET device. A bonding control processor is configured to bond a first silicon layer having a first crystalline orientation to a second silicon layer having a second crystalline orientation that is different from the first crystalline orientation. A material growth processor is configured to form a volume of material extending through the first silicon layer from the second layer up to the surface of first layer. The material has a crystalline orientation that substantially matches the crystalline orientation of second layer. An etching processor is configured to selectively etch areas of the surface of the first layer that are outside of the region to create a first plurality of fins and areas inside the region to create a second plurality of fins.
An electronic circuit comprising at least one p-FinFET device and at least one n-FinFET device, wherein the at least one p-FinFET device and the at least one n-FinFET device are situated parallel to each other on a hybrid orientation semiconductor substrate, the integrated circuit being fabricated according to a process comprising:
Dependencies are inferred from the claim text.