Graphically based method for developing connectivity drivers

A method for graphically developing a connectivity driver, comprising:

• inputting a hardware message having a stream of data into a non-transitory computer readable memory medium, wherein the hardware message has a first delimiter for demarking the boundary of a discrete record field within the hardware message;
• inputting the first delimiter into the computer readable memory medium;
• accessing the computer readable memory medium and generating, using a processor, a first graphical diagram in response to the inputting of the first delimiter, wherein the graphical diagram includes:
• a first branch having a primary parsing node, wherein the first branch represents the discrete record field within the hardware message, and wherein the primary parsing node represents the discrete record field within the hardware message and contains information on how to separate the discrete record field from the hardware message;
• graphically assembling a second graphical diagram in response to user input, wherein the second graphical diagram includes:
• a first state node and a second state node, wherein the first state node is connected with the second state node via a transition, wherein each state node represents a unique hardware state of the hardware device, and the transition includes a transition condition required to move from the first state to the second state, wherein the second graphical diagram maps out various states of the hardware device;
• and
• converting the first and second graphical diagrams into program code from which the connectivity driver is executed.

A laboratory information management system including a module for graphically developing a connectivity driver, comprising:

• a non-transitory computer readable memory medium;
• and
• at least one processor operable to access from the computer readable memory medium program instructions executable by the processor to:
• assemble a first graphical diagram in response to user input, wherein the first graphical diagram represents a parsing sequence for analyzing and converting a hardware message sent using a hardware protocol into software data having a file format readable by a computer program, wherein the entire parsing sequence defines a hardware grammar used to encode and decode discrete fields into and from the hardware message, wherein the first graphical diagram includes:
• a first branch having a primary parsing node, wherein the primary parsing node represents a discrete record field within the hardware message and contains information on how to separate the discrete record field from the hardware message;
• and
• assemble a second graphical diagram in response to user input, wherein the second graphical diagram includes:
• a first state node and a second state node, wherein the first state node is connected with the second state node via a transition, wherein each state node represents a unique hardware state of the hardware device, and the transition includes a transition condition required to move from the first state to the second state, wherein the second graphical diagram maps out various states of the hardware device.