# US 8,572,527 B1 · Generating properties for circuit designs

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 8,572,527 B1
- Document ID: US8572527B1
- Status: Granted
- Kind: B1
- Application number: 13/231,583
- Filed: 2011-09-13
- Granted: 2013-10-29
- Earliest claimed: 2011-09-13
- Assignees: Jasper Design Automation, Inc.
- Applicants: Claudionor José Nunes Coelho, Jr.; Fabiano Cruz Peixoto
- Inventors: Claudionor José Nunes Coelho, Jr.; Fabiano Cruz Peixoto
- Web page: https://patentgrep.com/patent/US8572527B1

## CPC

- G06F 30/3323: using formal methods, e.g. equivalence checking or property checking
- G06F 30/33: Design verification, e.g. functional simulation or model checking
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An analysis tool that generates properties for a circuit design. The debugging tool receives a circuit design encoded in a hardware description language. The tool identifies portions of the circuit design that correspond to features of interest (e.g., counters, finite state machines, one hot vectors, etc) in the circuit design. Each portion of the circuit design has a cone of influence, and the tool identifies control signals from within the cones of influence. By identifying control signals in this manner, the tool can then generate the properties based on values for the control signals and the identified portions of the circuit design that are obtained from data describing the operation of the circuit design over a number of clock cycles (e.g., simulation data). The result is one or more properties that are likely to represent a relevant behavior of the circuit design.

## Claims

### Claim 1

A computer program product for generating circuit design properties, the computer program product comprising a non transitory computer-readable storage medium containing computer program code for:
receiving a description of a circuit design;
identifying one or more portions of the circuit design that correspond to features of the circuit design, the identified portions of the circuit design associated with input cones of influence in the circuit design that affect operation of the identified portions of the circuit design;
identifying one or more control signals from within the input cones of influence associated with the identified portions of the circuit design, the control signals controlling signal routing within the input cones of influence;
generating one or more properties for the circuit design based on values of the control signals in data describing the operation of the circuit design over a plurality of clock cycles and values of the identified portions of the circuit design in the data describing the operation of the circuit design over the plurality of clock cycles; and
outputting the properties.

### Claim 2 (depends on 1)

A computer program product of claim 1, wherein the description of the circuit design is encoded in a hardware description language.

### Claim 3 (depends on 1)

The computer program product of claim 1, wherein the steps of identifying one or more portions of the circuit design and identifying one or more control signals are performed with a static analysis of the circuit design.

### Claim 4 (depends on 1)

The computer program product of claim 1, wherein the identified portions of the circuit design comprises registers.

### Claim 5 (depends on 1)

The computer program product of claim 1, wherein the identified portions of the circuit design comprise signals.

### Claim 6 (depends on 1)

The computer program product of claim 1, wherein identifying the one or more portions of the circuit design comprises:
identifying a first portion of the circuit design and a second portion of the circuit design;
determining whether the first and second portions are related; and
responsive to the first and second portions being related, associating the first portion of the circuit design with the second portion of the circuit design.

### Claim 7 (depends on 6)

The computer program product of claim 6, where determining whether the first and second portions are related comprises determining whether the first and second portions are compared with combinatorial logic in the circuit design.

### Claim 8 (depends on 6)

The computer program product of claim 6, wherein determining whether the first and second portions are related comprises determining whether the first portion is in a control cone of influence of the second portion.

### Claim 9 (depends on 6)

The computer program product of claim 6, wherein determining whether the first and second portions are related comprises determining whether the first and second portions are related based on a number of control signals shared by control cone of influences of the first and second portions.

### Claim 10 (depends on 1)

The computer program product of claim 1, wherein identifying the one or more control signals comprises identifying one or more control signals having less than a pre-determined bit size.

### Claim 11 (depends on 1)

The computer program product of claim 1, wherein identifying the one or more control signals comprises identifying one or more control signals that directly control the signal routing in the cones of influence.

### Claim 12 (depends on 1)

The computer program product of claim 1, wherein identifying the one or more control signals comprises identifying control signals that that indirectly control the signal routing in the cones of influence.

### Claim 13 (depends on 1)

The computer program product of claim 1, wherein generating one or more properties comprises:
identifying logic in the circuit design that compares at least a first portion and a second portion of the identified portions of the circuit design;
determining an output of the logic based on values of the first and second portions in the data describing the operation of the circuit design; and
generating one or more properties for the circuit design based on the values of the control signals in the data describing the operation of the circuit design and the output of the identified logic.

### Claim 14 (depends on 13)

The computer program product of claim 13, wherein the logic is identified from a relational expression in the description of the circuit design that compares a function of the first portion of the circuit design to a function of the second portion of the circuit design.

### Claim 15 (depends on 1)

The computer program product of claim 1, wherein generating the one or more properties comprises:
generating a set of behaviors for the circuit design based on the values of the control signals and the values of the identified portions of the circuit design in the data describing the operation of the circuit design; and
generating the one or more properties based on the set of behaviors.

### Claim 16 (depends on 15)

The computer program product of claim 15, wherein generating the one or more properties based on the set of behaviors comprises:
generating a reduced set of behaviors based on the set of behaviors; and
generating the one or more properties based on the reduced set of behaviors.

### Claim 17 (depends on 16)

The computer program product of claim 16, wherein generating the reduced set of behaviors comprises applying a logic optimization algorithm to set the set of behaviors to generate the reduced set of behaviors.

### Claim 18 (depends on 15)

The computer program product of claim 15, wherein generating the one or more properties based on the set of behaviors comprises:
generating a complement set of behaviors based on the set of behaviors, the complement set of behaviors representing a logical complement of the set of behaviors; and
generating the one or more properties based on the complement set of behaviors.

### Claim 19 (depends on 15)

The computer program product of claim 15, wherein generating the set of behaviors comprises translating the values of the identified portions of the circuit design in the data describing the operation of the circuit design into pre-determined categories.

### Claim 20 (depends on 1)

The computer program product of claim 1, wherein at least one of the properties represents an assertion.

### Claim 21 (depends on 1)

The computer program product of claim 1, wherein at least one of the properties represents a cover.

### Claim 22 (depends on 1)

The computer program product of claim 1, wherein at least one of the properties represents a coverage hole.

### Claim 23 (depends on 1)

The computer program product of claim 1, wherein outputting the properties comprises storing the properties to a storage device.

### Claim 24 (depends on 1)

The computer program product of claim 1, wherein outputting the properties comprises presenting a report of the properties.

### Claim 25 (depends on 1)

The computer program product of claim 1, wherein outputting the properties comprises outputting the properties to a simulation tool.

### Claim 26 (depends on 1)

The computer program product of claim 1, wherein outputting the properties comprises outputting the properties to a formal verification tool.

### Claim 27

A computer-implemented method for generating circuit design properties, the method comprising:
receiving a description of a circuit design;
identifying one or more portions of the circuit design that correspond to features of the circuit design, the identified portions of the circuit design associated with input cones of influence in the circuit design that affect operation of the identified portions of the circuit design;
identifying one or more control signals from within the input cones of influence associated with the identified portions of the circuit design, the control signals controlling signal routing within the input cones of influence;
generating, by a computer, one or more properties for the circuit design based on values of the control signals in data describing the operation of the circuit design over a plurality of clock cycles and values of the identified portions of the circuit design in the data describing the operation of the circuit design over the plurality of clock cycles; and
outputting the properties.

### Claim 28 (depends on 1)

The computer program product of claim 1, wherein the data describing the operation of the circuit design over the plurality of clock cycles is a simulation signal trace for the circuit design.
