# US 8,572,524 B2 · Statistical optical proximity correction

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- Number: US 8,572,524 B2
- Document ID: US8572524B2
- Status: Granted
- Kind: B2
- Application number: 11/943,591
- Filed: 2007-11-21
- Published: 2009-05-21
- Granted: 2013-10-29
- Earliest claimed: 2007-11-21
- Assignees: Globalfoundries Singapore Pte. Ltd.
- Applicants: Wenzhan Zhou; Liang Choo Hsia; Meisheng Zhou; Zheng Zou
- Inventors: Wenzhan Zhou; Liang Choo Hsia; Meisheng Zhou; Zheng Zou
- Web page: https://patentgrep.com/patent/US8572524B2

## CPC

- G03F 1/36: Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)

## Abstract

An optical proximity correction (OPC) model incorporates inline process variation data. OPC is performed by adjusting an input mask pattern with a mask bias derived from the OPC model to correct errors in the input mask pattern.

## Claims

### Claim 1

A method for forming an IC comprising:
providing a substrate with a photoresist layer;
providing a mask with a mask pattern, wherein providing the mask comprises
deriving the mask pattern from an input mask design layout which is provided prior to forming a physical mask,
obtaining a mask bias from an optical proximity correction (OPC) model of an OPC system with an OPC simulator, wherein the OPC system estimates critical dimension (CD) variation of one or more feature types on the input mask from measured inline process variation data of an actual wafer process line to obtain the mask bias, wherein inline process variation data includes variations in develop inspection CD and resist sidewall angle measurements profile, and
adjusting the input mask with the mask bias to produce an adjusted input mask, and
forming the physical mask having a physical mask pattern using the adjusted input mask;
exposing the photoresist layer by passing radiation from an exposure source through the physical mask formed using the adjusted input mask; and
developing the photoresist to transfer the physical mask pattern of the physical mask to the photoresist layer.

### Claim 2 (depends on 1)

The method of claim 1 wherein the OPC model determines CD dependency of the one or more feature types on variations in one or more process parameters.

### Claim 3 (depends on 2)

The method of claim 2 wherein the one or more process parameters comprise exposure dose, focus or post exposure bake (PEB) temperature, or a combination thereof.

### Claim 4

A method for forming a mask comprising the steps of:
providing an input mask design layout which is used to form a physical mask prior to forming the physical mask;
performing optical proximity correction (OPC) of the input mask design layout using an OPC model with an OPC simulator, wherein the OPC model incorporates measured inline process variation data of an actual wafer process line to obtain a mask bias, wherein inline process variation data includes variations in develop inspection CD and resist sidewall angle measurements profile; and
forming the physical mask using the mask design layout biased with the measured inline process variation data.

### Claim 5 (depends on 4)

The method of claim 4 wherein the OPC model estimates critical dimension (CD) variation of one or more feature types on the input mask from the inline process variation data.

### Claim 6 (depends on 5)

The method of claim 5 wherein the OPC model determines CD dependency of the one or more feature types on variations in one or more process parameters.

### Claim 7 (depends on 6)

The method of claim 6 wherein the one or more process parameters comprise exposure dose, focus or post exposure bake (PEB) temperature, or a combination thereof.

### Claim 8 (depends on 6)

The method of claim 6 wherein the OPC model determines process windows of the one or more feature types based on the inline process variation data and estimated CD variation.

### Claim 9 (depends on 8)

The method of claim 8 wherein the steps of providing an input mask pattern and correcting errors in the input mask pattern are iteratively repeated until all the errors in the input mask pattern are corrected, the process windows are taken into account during iteration.

### Claim 10 (depends on 9)

The method of claim 9 wherein the OPC model identifies failure-sensitive weak points on the input mask pattern, the failure-sensitive weak points are taken into account during iteration.

### Claim 11 (depends on 4)

The method of claim 4 wherein the steps of providing an input mask pattern and correcting errors in the input mask pattern are iteratively repeated until all the errors in the input mask pattern are corrected.

### Claim 12

An optical proximity correction (OPC) system comprising:
an OPC simulator comprising an OPC model which incorporates measured inline process variation data of an actual wafer process line, wherein inline process variation data includes variations in develop inspection CD and resist sidewall angle measurements profile;
wherein the OPC simulator determines a mask bias based on the OPC model; and
when an input mask design layout is provided to the OPC system prior to forming a physical mask, the OPC system applies the mask bias to adjust the input mask design layout to correct errors in the input mask design layout to produce an output mask pattern, the output mask pattern is used to form the physical mask.

### Claim 13 (depends on 12)

The OPC system of claim 12 wherein the OPC model estimates critical dimension (CD) variation of one or more feature types on the input mask from the inline process variation data, and calculates an overall critical dimension (CD) yield (Cpk) based on an estimated CD variation.

### Claim 14 (depends on 13)

The OPC system of claim 13 wherein the OPC simulator further comprises a critical dimension (CD) verification module, the CD verification module analyzes the overall Cpk to determine if any errors exist.

### Claim 15 (depends on 14)

The OPC system of claim 14 wherein the OPC system performs iteration based on a feedback loop until all the errors in the input mask pattern are corrected.

### Claim 16 (depends on 15)

The OPC system of claim 15 wherein maximizing the overall Cpk is used as an optimization criteria during iteration.

### Claim 17 (depends on 13)

The OPC system of claim 13 wherein the OPC system performs iteration based on a feedback loop until all the errors in the input mask pattern are corrected.

### Claim 18 (depends on 17)

The OPC system of claim 17 wherein maximizing the overall Cpk is used as an optimization criteria during iteration.

### Claim 19 (depends on 12)

The OPC system of claim 12 wherein the OPC system performs iteration based on a feedback loop until all the errors in the input mask pattern are corrected.