# US 8,572,458 B1 · Forward error correction with parity check encoding for use in low complexity highly-spectrally efficient communications

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- Number: US 8,572,458 B1
- Document ID: US8572458B1
- Status: Granted
- Kind: B1
- Application number: 13/755,068
- Filed: 2013-01-31
- Granted: 2013-10-29
- Earliest claimed: 2012-06-20
- Assignees: MagnaCom Ltd.
- Applicants: MagnaCom Ltd.
- Inventors: Amir Eliaz
- Web page: https://patentgrep.com/patent/US8572458B1

## CPC

- H04L 1/0041: {Arrangements at the transmitter end}
- G06F 11/10: Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- H04B 1/0475: {with means for limiting noise, interference or distortion (H04B1/0483 takes precedence)}
- H04B 1/10: Means associated with receiver for limiting or suppressing noise or interference
- H04B 1/16: Circuits
- H04B 1/709: Correlator structure
- H04B 17/0085: {using test signal generators}
- H04B 17/29: Performance testing
- H04L 1/0036: {arrangements specific to the receiver}
- H04L 1/0048: {in conjunction with detection of multiuser or interfering signals, e.g. iteration between CDMA or MIMO detector and FEC decoder (for spatial equalizer H04L25/03286)}
- H04L 1/005: {Iterative decoding, including iteration between signal detection and decoding operation}
- H04L 1/0054: {Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms}
- H04L 1/203: {Details of error rate determination, e.g. BER, FER or WER}
- H04L 1/206: {for modulated signals}
- H04L 7/0058: {detection of error based on equalizer tap values}
- H04L 7/0087: {Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection}
- H04L 7/02: Speed or phase control by the received code signals, the signals containing no special synchronisation information {(H04L7/0075 takes precedence)}
- H04L 7/042: {Detectors therefor, e.g. correlators, state machines (digital correlators in general G06F17/15)}
- H04L 23/02: adapted for orthogonal signalling
- H04L 25/0236: {using estimation of the other symbols}
- H04L 25/03006: {Arrangements for removing intersymbol interference}
- H04L 25/03038: {with a non-recursive structure (H04L25/03031 takes precedence)}
- H04L 25/03057: {with a recursive structure (H04L25/03031 takes precedence)}
- H04L 25/03178: {Arrangements involving sequence estimation techniques}
- H04L 25/03197: {methods of calculation involving metrics}
- H04L 25/03267: {with decision feedback equalisers}
- H04L 25/0328: {with interference cancellation circuitry (adaptations for interference cancellation within a sequence estimator H04L25/03305; interference related aspects of direct sequence spread spectrum H04B1/7097; interference related aspects of frequency hopping spread spectrum H04B1/715; see also H04B1/10)}
- H04L 25/03305: {Joint sequence estimation and interference removal (joint detection of several desired signals H04L25/03331)}
- H04L 25/03318: {Provision of soft decisions}
- H04L 25/03337: {Arrangements involving per-survivor processing}
- H04L 25/03343: {Arrangements at the transmitter end}
- H04L 25/03834: {using pulse shaping}
- H04L 25/03885: {adaptive}
- H04L 25/03949: {equalizer selection or adaptation based on feedback (multiple signaling inclusive of a precoding command for adapting the transmitter H04L1/0031; feedback for transmit diversity systems H04B7/0619; selection of codebook or precoding matrix for MIMO diversity systems H04B7/0456)}
- H04L 25/08: Modifications for reducing interference; Modifications for reducing effects due to line faults {; Receiver end arrangements for detecting or overcoming line faults}
- H04L 27/00: Modulated-carrier systems
- H04L 27/01: Equalisers {(baseband equalizers at the transmitter end H04L25/03343; in analogue transmission systems H04B3/04, H04B7/005)}
- H04L 27/02: Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation (H04L27/32 takes precedence)
- H04L 27/04: Modulator circuits; Transmitter circuits
- H04L 27/2278: {using correlation techniques, e.g. for spread spectrum signals}
- H04L 27/36: Modulator circuits; Transmitter circuits
- H04L 27/366: {Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator}
- H04L 27/368: {adaptive predistortion}
- H04L 27/38: Demodulator circuits; Receiver circuits
- H04B 2001/0416: {having gain or transmission power control}
- H04L 2025/03369: {Partial response}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04B: TRANSMISSION

## Abstract

A transmitter inserts parity samples into a stream of information symbols in an inter-symbol correlated (ISC) signal. The inserted parity samples may be utilized to generate estimates of corresponding information symbols when they are received by a receiver. The information symbols may be pulse shaped by a first pulse shaping filter characterized by a first response. The parity samples may be pulsed shaped by a second pulse shaping filter characterized by a second response. The first response and the second response are diverse or uncorrelated. The transmitter may transmit the ISC signal comprising the pulse shaped information symbols and the pulse shaped parity samples. The parity samples may be generated utilizing a non-linear function over a plurality of the information symbols. The non-linear function may be diverse from a partial response signal convolution corresponding to the information symbols and is designed according to a desired SNR value at the receiver.

## Claims

### Claim 1

A method, comprising:
in a transmitter:
inserting parity samples into a stream of information symbols in an inter-symbol correlated (ISC) signal, wherein said inserted parity samples are utilized to generate estimates of corresponding received information symbols;
pulse shaping said information symbols by a first pulse shaping filter characterized by a first response;
pulse shaping said parity samples by a second pulse shaping filter characterized by a second response, wherein said first response and said second response are diverse; and
generating said parity samples utilizing a parity function over a plurality of said information symbols;
wherein:
said parity function comprises a non-linear function, and said non-linear function is diverse from a partial response signal convolution corresponding to said information symbols; and
said parity function is determined according to a desired SNR range at a receiver.

### Claim 2

A method comprising:
in a transmitter:
inserting parity samples into a stream of information symbols in an inter-symbol correlated (ISC) signal, wherein said inserted parity samples are utilized to generate estimates of corresponding received information symbols;
pulse shaping said information symbols by a first pulse shaping filter characterized by a first response;
pulse shaping said parity samples by a second pulse shaping filter characterized by a second response, wherein said first response and said second response are diverse; and
transmitting said inter-symbol correlated signal comprising said pulse shaped information symbols and said pulse shaped parity samples, wherein a power of said parity samples is optimized for best sequence estimation and best symbol error rate (SER) performance.

### Claim 3 (depends on 2)

The method according to claim 2, comprising generating said parity samples utilizing a parity function over a plurality of said information symbols.

### Claim 4 (depends on 3)

The method according to claim 3, wherein:
said parity function comprises a non-linear function, and said non-linear function is diverse from a partial response signal convolution corresponding to said information symbols; and
said parity function is designed according to a desired SNR range at a receiver.

### Claim 5 (depends on 3)

The method according to claim 3, wherein said parity function incorporates a memory depth, which is larger than a memory of a partial response corresponding to taps of said first pulse shaping filter.

### Claim 6 (depends on 5)

The method according to claim 5, wherein:
said parity function operates over adjacent ones of said information symbols; and
corresponding intervals among said adjacent information symbols are dependent on one or both of: a length of an error event and an SNR operating range.

### Claim 7 (depends on 2)

The method according to claim 2, comprising:
inserting said parity samples between consecutive ones of said information symbols to generate a combined stream; and
convolving said combined stream with corresponding taps of said first pulse shaping filter.

### Claim 8 (depends on 2)

The method according to claim 2, wherein a parity metric is generated from said inserted parity samples, and said generated parity metric is utilized to select a best one or more of said generated estimates of said corresponding received information symbols and/or a best one or more paths of said corresponding information symbols.

### Claim 9

A method comprising:
in a transmitter:
inserting parity samples into a stream of information symbols in an inter-symbol correlated (ISC) signal, wherein said inserted parity samples are utilized to generate estimates of corresponding received information symbols;
pulse shaping said information symbols by a first pulse shaping filter characterized by a first response;
pulse shaping said parity samples by a second pulse shaping filter characterized by a second response, wherein said first response and said second response are diverse;
generating said parity samples utilizing a parity function over a plurality of said information symbols; and
wherein:
said parity function incorporates a memory depth, which is larger than a memory of a partial response corresponding to taps of said first pulse shaping filter;
a non-linear function and/or a linear function utilized for said parity function incorporates a modulo operation that ensures that an amplitude of corresponding values of parity samples are maintained in a particular range; and
said modulo operation operates in a two dimensional (2D) domain.

### Claim 10

A system, comprising:
one or more processors and/or circuits for use in a transmitter, said one or more processors and/or circuits being operable to:
insert parity samples into a stream of information symbols in an inter-symbol correlated (ISC) signal, wherein said inserted parity samples are utilized to generate estimates of corresponding received information symbols; and
generate said parity samples utilizing a parity function over a plurality of said information symbols;
wherein:
said one or more processors and/or circuits comprise a first pulse shape filter characterized by a first response, said first pulse shaping filter being operable to pulse shape said information symbols;
said one or more processors and/or circuits comprise a second pulse shaping filter characterized by a second response, said second pulse shaping filter being operable to pulse shape said parity samples;
said parity function comprises a non-linear function, and said non-linear function is diverse from a partial response signal convolution corresponding to said information symbols; and
said parity function is designed according to a desired SNR range at a receiver.

### Claim 11

A system comprising:
one or more processors and/or circuits for use in a transmitter, wherein:
said one or more processors and/or circuits are operable to insert parity samples into a stream of information symbols in an inter-symbol correlated (ISC) signal, wherein said inserted parity samples are utilized to generate estimates of corresponding received information symbols;
said one or more processors and/or circuits are operable to transmit said inter-symbol correlated signal comprising said pulse shaped information symbols and said pulse shaped parity samples, wherein a power of said parity samples is optimized for best sequence estimation and best symbol error rate (SER) performance;
said one or more processors and/or circuits comprise a first pulse shape filter characterized by a first response, said first pulse shaping filter being operable to pulse shape said information symbols; and
said one or more processors and/or circuits comprise a second pulse shaping filter characterized by a second response, said second pulse shaping filter being operable to pulse shape said parity samples.

### Claim 12 (depends on 11)

The system according to claim 11, wherein said one or more processors and/or circuits are operable to generate said parity samples utilizing a parity function over a plurality of said information symbols.

### Claim 13 (depends on 12)

The system according to claim 12, wherein:
said parity function comprises a non-linear function, and said non-linear function is diverse from a partial response signal convolution corresponding to said information symbols; and
said parity function is designed according to a desired SNR range at a receiver.

### Claim 14 (depends on 12)

The system according to claim 12, wherein said parity function incorporates a memory depth, which is larger than a memory of a partial response corresponding to taps of said first pulse shaping filter.

### Claim 15 (depends on 14)

The system according to claim 14, wherein:
said parity function operates over adjacent information symbols; and
corresponding intervals among said adjacent information symbols are dependent on one or both of: a length of an error event and/or an SNR operating range.

### Claim 16 (depends on 11)

The system according to claim 11, wherein said one or more processors and/or circuits are operable to:
insert said parity samples between consecutive ones of said information symbols to generate a combined stream; and
convolve said combined stream with corresponding taps of said first pulse shaping filter.

### Claim 17 (depends on 11)

The system according to claim 11, wherein a parity metric is generated from said inserted parity samples, and said generated parity metric is utilized to select a best one or more of said generated estimates of said corresponding received information symbols and/or a best one or more paths of said corresponding information symbols.

### Claim 18

A system comprising:
one or more processors and/or circuits for use in a transmitter, wherein:
said one or more processors and/or circuits are operable to insert parity samples into a stream of information symbols in an inter-symbol correlated (ISC) signal, wherein said inserted parity samples are utilized to generate estimates of corresponding received information symbols;
said one or more processors and/or circuits are operable to generate said parity samples utilizing a parity function over a plurality of said information symbols;
said one or more processors and/or circuits comprise a first pulse shape filter characterized by a first response, said first pulse shaping filter being operable to pulse shape said information symbols;
said one or more processors and/or circuits comprise a second pulse shaping filter characterized by a second response, said second pulse shaping filter being operable to pulse shape said parity samples;
said parity function incorporates a memory depth, which is larger than a memory of a partial response corresponding to taps of said first pulse shaping filter;
a non-linear function and/or a linear function utilized for said parity function incorporates a modulo operation that ensures that an amplitude of corresponding values of parity samples are maintained in a particular range; and
said modulo operation operates in a two dimensional (2D) domain.