Power supply system of electronic device with improved power saving in S5 state

A power supply system for an electronic device, comprising:

• a power supply unit adapted to convert an AC power into a first DC power;
• a DC/DC converter provided with the first DC power, the DC/DC converter is adapted to convert the first DC power to a second DC power;
• and
• a first chipset, the DC/DC converter connected to the first chipset directly to supply the second DC power to the first chipset, the first chipset comprising a control pin;
• and
• a second chipset connected to the DC/DC converter via a switch, the second chipset connected to the control pin and controlled by the control pin, wherein the control pin is adapted to turn on the switch to have the DC/DC converter supplying the second DC power to the second chipset when the electronic device is turned on, and the control pin is adapted to turn off the switch when the electronic device is shut down;
• wherein the switch is a P channel MOSFET, a grid of the P channel MOSFET is connected to the control pin of the first chipset, a source of the P channel MOSFET is connected to the DC/DC converter to receive the second DC power, and a drain of the P channel MOSFET is connected to the second chipset;
• the control pin is adapted to output a low level control signal when the electronic device is turned on, and is adapted to output a high level control signal when the electronic device is shut down.

A power supply system for an electronic device, comprising:

• a power supply unit adapted to convert an AC power into a first DC power;
• a DC/DC converter connected to the power supply unit, the DC/DC converter adapted to convert the first DC power into a second DC power;
• a super I/O chipset, the DC/DC converter connected to the super I/O chipset directly to provide the second DC power to the super I/O chipset;
• and
• a south bridge chipset connected to the DC/DC converter via a switch connected to the super I/O chipset and controlled by the super I/O chipset, wherein the super I/O chipset is adapted to turn on the switch to have the DC/DC converter supply the second DC power to the south bridge chipset, when the electronic device is turned on, and the super I/O chipset is adapted to turn off the switch when the electronic device is shut down;
• wherein the switch is a P channel MOSFET, a grid of the P channel MOSFET is connected to a control pin of the super I/O chipset, a source of the P channel MOSFET is connected to the DC/DC adapted to receive the second DC power, and a drain of the P channel MOSFET is connected to the south bridge chipset;
• the control pin is adapted to output a low level control signal when the electronic device is turned on and is adapted to output a high level control signal when the electronic device is shut down.