Memory management unit (MMU) having region descriptor globalization controls and method of operation
AssigneeFreescale Semiconductor, Inc.
InventorWilliam C. Moyer
Life of this patent
Estimating the term…
Abstract
Embodiments of computer processing systems and methods are provided that include a memory protection unit (MPU), and a plurality of region descriptors associated with the MPU. The region descriptors include address range and translation identifier values for a respective region of memory. Control logic determines whether a translation identifier control indicator is in a first state, and if the translation identifier control indicator is in the first state, the control logic allows a first process being executed by the processing system to access a memory region allocated to a second process being executed by the processing system.
Claims19
A computer processing system comprising:
- a memory protection unit (MPU);
- a plurality of region descriptors associated with the MPU, wherein the region descriptors include address range and translation identifier values for a respective region of memory;
- a translation identifier control indicator (TIDCTL);
- and
- control logic operable to determine whether the translation identifier control indicator is in a first state, and if the translation identifier control indicator is in the first state, allow a first process being executed by the processing system to access a memory region allocated to a second process of the processing system.
A computer processing system comprising:
- a memory protection unit (MPU);
- a control register including a globalization process identifier (G_PID) field;
- a plurality of region descriptors associated with the MPU, wherein at least one of the region descriptors is allocated to a first process;
- and
- control logic operable to allow the first process to access a region of memory allocated for a second process when a process identifier (PID) for the first process matches a value in the G_PID field.
A method comprising:
- initializing a translation identifier control (TIDCTL) indicator in a control register of a memory protection unit (MPU) in a computer system;
- and
- when the TIDCTL indicator is in a first state, masking translation identifier comparisons in one or more of a plurality of region descriptors of the MPU for first and second processes to allow the first process to access a memory region allocated to the second process.
Dependencies are inferred from the claim text.