Device and method for arbitrating between direct memory access task requests
AssigneeFreescale Semiconductor, Inc.
InventorsUri Shasha, Sagi Gurfinkel, Gilad Hassid, Eran Kahn, Yehuda Shvager
Life of this patent
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Abstract
A method for arbitrating between direct memory access task requests, the method includes receiving multiple DMA task requests; the method is characterized by selecting a DMA task request out of the multiple DMA task requests in response to timing deadlines associated with the DMA tasks. A device that includes an interface, that is adapted to receive DMA task requests; the device is characterized by including an arbiter that is adapted to select a DMA task request out of the multiple DMA task requests in response to timing deadlines associated with the DMA tasks.
Claims19
A method for arbitrating between direct memory access (DMA) task requests, the method comprises:
- defining a plurality of timing deadline ranges, each timing deadline range comprising a plurality of timing deadlines;
- receiving multiple DMA task requests, wherein each DMA task request includes a current counter field for storing a current value of a timing counter, and a threshold field for storing a threshold value, wherein the threshold value reflects a value of the timing counter when the associated DMA task is due, and wherein a difference between the current value of the timing counter and the threshold value represents a timing deadline for the associated DMA task;
- sorting the multiple DMA task requests into the plurality of timing deadline ranges based upon the timing deadlines associated with the respective DMA tasks;
- selecting a first DMA task request out of the multiple DMA task requests, wherein the selecting includes selecting one of a plurality of DMA task requests associated with a particular timing deadline range;
- determining that a first timing deadline of the first DMA task has passed, wherein the first timing deadline occurs prior to a time when the current value of the timing counter for the first DMA task equals the threshold value for the first DMA task;
- and
- increasing a priority of the first DMA task in response to determining that the first timing deadline has passed;
- wherein at least one DMA task is a cyclic time based DMA task that has a repetition rate that is limited by a DMA task execution period.
A device that comprises:
- an interface that is adapted to:
- define a plurality of timing deadline ranges, each timing deadline range comprising a plurality of timing deadlines;
- and
- receive multiple direct memory access (DMA) task requests, wherein each DMA task includes a current counter field for storing a current value of a timing counter, and a threshold for storing a threshold value, wherein the threshold value reflects a value of the timing counter when the associated DMA task is due, and wherein a difference between the current value of the timing counter and the threshold value represents a timing deadline for the associated DMA task;
- an arbiter that is adapted to:
- sort the multiple DMA task requests into the plurality of timing deadline ranges in response to the timing deadlines associated with the respective DMA tasks;
- select a first DMA task request out of the multiple DMA task requests, wherein in selecting, the arbiter is further adapted to select one of a plurality of DMA task requests associated with a particular timing deadline range of the plurality of timing deadline ranges;
- determine that a first timing deadline of the first DMA task has passed, wherein the first timing deadline occurs prior to a time when the current value of the timing counter for the first DMA task equals the threshold value for the first DMA task;
- and
- increase a priority of the first DMA task in response to determining that the first timing deadline has passed.
Dependencies are inferred from the claim text.