CORDIC computation circuit and method
AssigneeNEC Corporation
InventorKatsutoshi Seki
Life of this patent
Estimating the term…
Abstract
Disclosed is a CORDIC circuit in which scale correction process is divided into two stages: rough correction and fine correction, and a second-process of a pseudo-rotation process is performed in parallel with the fine scale correction. A range of the fine scale correction is set so that it is not necessary to perform a scale correction with regard to a remaining rotation angle of the first half of the pseudo-rotation process.
Claims16
A CORDIC computation circuit receiving an input vector and a rotation angle, comprising:
- a rough scale correction stage that receives X and Y components of the input vector and that performs rough scale correction on the X and Y components of the input vector to output results of multiplication of a rough correction scaling coefficient and the X and Y components, respectively;
- a rotation processing unit that receives the results output from the rough scale correction stage and the rotation angle and that performs a first half of pseudo-rotation process on the results from the rough scale correction stage using the rotation angle to output resulting X and Y components;
- a fine scale correction stage that receives the X and Y components form the first half of the pseudo-rotation process of the rotation processing unit and that performs a fine scale correction on the X and Y components from the first half of the pseudo-rotation process to output results of multiplication of a fine correction scaling coefficient and the X and Y components, respectively, a scale correction process being divided into two stages including the rough scale correction stage and the fine scale correction stage;
- and
- a unit that receives the X and Y components from the first half of the pseudo-rotation process of the rotation processing unit and a rotation angle from the first half of the pseudo-rotation process of the rotation processing unit and that performs a second half of the pseudo-rotation process multiplying the X and Y components from the first half of the pseudo-rotation process by the rotation angle from the first half of the pseudo-rotation process, the second half of the pseudo-rotation process being performed in parallel with the fine scale correction stage.
A CORDIC computation circuit receiving a vector (X, Y) and a rotation angle (Z) as inputs, comprising:
- an X path rough scale correction unit that performs rough scale correction on an X component of the vector (X, Y), and outputs a result of multiplication of a rough correction scaling coefficient and the X component;
- a Y path rough scale correction unit that performs rough scale correction on a Y component of the vector, and outputs a result of multiplication of a rough correction scaling coefficient and the Y component;
- a plurality of stages of rotation processing circuits connected in cascade,
- the rotation processing circuit of a first stage receiving an X component and a Y component outputted respectively from the X and Y path rough scale correction units, and a rotation angle to perform an iterative rotation process, a rotation processing circuit of a later stage receiving an X component, a Y component and a rotation angle outputted from a rotation processing circuit of a preceding stage to perform an iterative rotation process;
- an X path fine scale correction unit that performs a fine scale correction on an X component outputted from the rotation processing circuit of a last stage, and outputs a result of multiplying a fine correction scaling coefficient and the X component;
- a Y path fine scale correction unit that performs a fine scale correction on a Y component outputted from the rotation processing circuit of a last stage, and outputs a result of multiplication of a fine correction scaling coefficient and the Y component;
- an X path variable multiplier juxtaposed with the X path fine scale correction unit to multiply a Y component outputted from the rotation processing circuit of a last stage by a rotation angle from the rotation processing circuit of a last stage;
- a Y path variable multiplier juxtaposed with the Y path fine scale correction unit to multiply an X component outputted from the rotation processing circuit of a last stage by a rotation angle from the rotation processing circuit of a last stage;
- an X path adder/subtractor that outputs a result of adding or subtracting a multiplication result of the X path fine scale correction unit and a multiplication result of the X path variable multiplier;
- and
- a Y path adder/subtractor that outputs a result of adding or subtracting a multiplication result of the Y path fine scale correction unit and a multiplication result of the Y path variable multiplier.
A method for performing a CORDIC operation using a CORDIC computation circuit, the method comprising:
- receiving, by the CORDIC computation circuit, an input vector and a rotation angle;
- performing, by the CORDIC computation circuit, a rough scale correction on X and Y components of the input vector to output results of multiplication of a rough correction scaling coefficient and the X and Y components, respectively;
- performing, by the CORDIC computation circuit, a first half of a pseudo-rotation process on the results output from the rough scale correction using the rotation angle to output resulting X and Y components;
- performing, by the CORDIC computation circuit, a fine scale correction on the X and Y components resulting from the first half of a pseudo-rotation process to output results of multiplication of a fine correction scaling coefficient and the X and Y components, respectively;
- and
- performing, by the CORDIC computation circuit, a second half of a pseudo-rotation process in parallel with the fine scale correction process, the second half of the pseudo-rotation process multiplying the X and Y components resulting from the first half of the pseudo-rotation process by a rotation angle from the first half of the pseudo-rotation process.
A CORDIC computation circuit receiving a vector (X, Y) and a rotation angle (Z), comprising:
- an X path rough scale correction unit that performs a rough scale correction process on an X component x(0) of an input vector, and outputs Kq1*x(0);
- a Y path rough scale correction unit that performs a rough scale correction process on a Y component y(0) of the input vector, and outputs Kq1*y(0);
- first to q-th rotation processing circuits connected in cascade;
- an X path fine scale correction unit that performs a fine scale correction process on an X component x(q) outputted from the q-th rotation processing circuit, and outputs a result Kq2*x(q) of multiplying a fine correction scaling coefficient Kq2 and the X component x(q);
- a Y path fine scale correction unit that performs a fine scale correction process on a Y component y(q) outputted from the q-th rotation processing circuit, and outputs a result Kq2*y(q) of multiplying a fine correction scaling coefficient Kq2 and the Y component y(q);
- an X path variable multiplier juxtasposed with the X path fine scale correction unit to output a result z(q)*y(q) of multiplying a Y component y(q) outputted from the q-th rotation processing circuit and a rotation angle z(q) from the q-th rotation processing circuit;
- a Y path variable multiplier juxtasposed with the Y path fine scale correction unit to output a result z(q)*x(q) of multiplying an X component x(q) outputted from the q-th rotation processing circuit and a rotation angle z(q) from the q-th rotation processing circuit;
- an X path adder/subtractor that outputs a result of adding a multiplication result Kq2*x(q) of the X path fine scale correction unit and a multiplication result z(q)*y(q) of the X path variable multiplier, and
- a Y path adder/subtractor that outputs a result of subtracting a multiplication result Kq2*y(q) of the Y path fine scale correction unit and a multiplication result z(q)*x(q) of the Y path variable multiplier, wherein
- a scaling coefficient Kq is expressed as a product Kq1*Kq2 of the rough correction scaling coefficient Kq1 and the fine correction scaling coefficient Kq2,
- the rough correction scaling coefficient Kq1, being given as:
- K
- q
-
-
- 1
- =
- ∏
- j
- =
- 0
- n
- /
- 2
-
-
- (
- 1
- +
- γ
- j
-
- 2
- -
- j
- )
- where
- γ
- j
- =
- {
- -
- 1
- ,
- 0
- ,
- 1
- }
- in the X path rough scale correction unit and Y path rough scale correction unit, a rough scale correction being derived by an iterative shift addition process, for scale correction, of less than half of a prescribed bit accuracy n,
- the fine correction scaling coefficient Kq2 being given as
- K
- q
-
-
- 2
- =
- ∏
- j
- =
- n
- /
- 2
- +
- 1
- n
- -
- 1
-
-
- (
- 1
- +
- γ
- j
-
- 2
- -
- j
- )
- where
- γ
- j
- =
- {
- -
- 1
- ,
- 0
- ,
- 1
- }
- the first rotation processing circuit receiving Kq1*x(0) and Kq1*y(0) outputted from the X path rough scale correction unit and the Y path rough scale correction unit, and a rotation angle z(0) to output vector x(1) and y(1) and rotation angle z(1) by computation as follows:
- x(1)=Kq1x(0)+σ0Kq1y(0)
- y(1)=Kq1y(0)−σ0Kq1x(0)
- z(1)=z(0)+σ0π/4
- σ0=sign(z(0))
- a (j+1)-th rotation processing circuit (where j=1 to q−1) receiving x(j), y(j), and z(j) outputted from a j-th rotation processing circuit to output vector x(j+1) and y(j+1) and rotation angle z(j+1) by computation as follows:
- x(j+1)=x(j)+σj2−jy(j)
- y(j+1)=y(j)−σj2−jx(j)
- z(j+1)=z(j)+σjαj
- αj=arctan(2−j)
- σj=sign(z(j))
- j=1, . . . ,q−1
- computation of a product Kq2*x(q) of the fine correction scaling coefficient Kq2 and output x(q) of the q-th rotation processing circuit, in the X path fine scale correction unit, and computation of a product z(q)*y(q) of output z(q) and y(q) of the q-th rotation processing circuit, in the X path variable multiplier, being performed in parallel,
- computation of a product Kq2*y(q) of the fine correction scaling coefficient Kq2 and output y(q) of the q-th rotation processing circuit, in the Y path fine scale correction unit, and computation of a product z(q)*x(q) of output z(q) and x(q) of the q-th rotation processing circuit, in the Y path variable multiplier, being performed in parallel,
- the X path adder/subtractor outputting Kq2*x(q)+z(q)*y(q), and
- the Y path adder/subtractor outputting Kq2*y(q)−z(q)*x(q).
Dependencies are inferred from the claim text.