Apparatus and method for mapping symbol
AssigneesSamsung Electronics Co., Ltd., Electronics and Telecommunications Research Institute
InventorsDongSeung Kwon, Byung-Jae Kwak, Choongil Yeh, Young Seog Song, Seung Joon Lee, Jihyung Kim, Wooram Shin, Bum-Soo Park, Chung Gu Kang, Jin-Woo Kim
Life of this patent
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Abstract
In a symbol mapping method, transmission data is encoded to output information bits and redundancy bits. The information bits and the redundancy bits are mapped to a symbol according to a first mapping scheme at a first transmission, and the information bits and the redundancy bits are mapped to a symbol according to a second mapping scheme at a second transmission.
Claims7
A method of mapping transmission data to a symbol in a symbol mapping apparatus, the method comprising:
- encoding the transmission data to output a plurality of information bits and a plurality of redundancy bits;
- mapping the information bits and the redundancy bits to symbols according to a first mapping scheme at a first transmission;
- and
- mapping the information bits and the redundancy bits to the symbols according to a second mapping scheme at a second transmission, the second mapping scheme being different from the first mapping scheme,
- wherein mapping the information bits and the redundancy bits to the symbols according to the first mapping scheme comprises:
- mapping the information bits to first bits of the symbols;
- and
- mapping the redundancy bits to second bits of the symbols,
- wherein mapping the information bits and the redundancy bits to the symbols according to the second mapping scheme comprises:
- mapping the information bits to the second bits of the symbols;
- and
- mapping the redundancy bits to the first bits of the symbols, and
- wherein the positional reliability of the first bits is higher than that of the second bits or the positional reliability of the first bits is lower than that of the second bits.
A symbol mapping apparatus comprising:
- a channel coder that encodes transmission data to output a plurality of information bits and a plurality of redundancy bits;
- and
- a symbol mapper that maps the information bits and the redundancy bits to symbols according to a first mapping scheme at a first transmission, and maps the information bits and the redundancy bits to the symbols according to a second mapping scheme at a second transmission, the second mapping scheme being different from the first mapping scheme,
- wherein the information bits are mapped to first bits of the symbols and the redundancy bits are mapped to second bits of the symbols at the first transmission,
- wherein the information bits are mapped to the second bits of the symbols and the redundancy bits are mapped to the first bits of the symbols at the second transmission, and
- wherein the positional reliability of the first bits is higher than that of the second bits or the positional reliability of the first bits is lower than that of the second bits.
A method of mapping transmission data to a symbol in a symbol mapping apparatus, the method comprising:
- encoding the transmission data to output a plurality of information bits and a plurality of redundancy bits;
- mapping the information bits and the redundancy bits to symbols according to a first mapping scheme at an initial transmission;
- transmits a packet including the symbols mapped according to the first mapping scheme;
- mapping the information bits and the redundancy bits to the symbols according to a second mapping scheme, the second mapping scheme being different from the first mapping scheme;
- and
- retransmits a packet including the symbols mapped according to the second mapping scheme,
- wherein the information bits are mapped to first bits of the symbols and the redundancy bits are mapped to second bits of the symbols at the initial transmission,
- wherein the information bits are mapped to the second bits of the symbols and the redundancy bits are mapped to the first bits of the symbols at the retransmission, and
- wherein the positional reliability of the first bits is higher than that of the second bits or the positional reliability of the first bits is lower than that of the second bits.
Dependencies are inferred from the claim text.