US 8,570,817 B2Granted

Data input device for semiconductor memory device

AssigneeElite Semiconductor Memory Technology Inc.

InventorMing-Chien Huang

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Abstract

A data input device for use in a memory device to avoid false data being written due to a postamble ringing phenomenon in a write operation is provided. The data input device comprises a buffer, a combinational logic circuit and a flip-flop unit. The buffer receives the data and outputs internal data to the flip-flop unit. The combinational logic circuit receives an external data strobe signal to generate a first data strobe signal and a second data strobe signal. The flip-flop unit stores the data in synchronization with the first data strobe signal and outputs the stored data in synchronization with the second data strobe signal. A last rising edge of the second data strobe signal is generated prior to onset of the postamble ringing on the external data strobe signal, so that a data transferred path in the flip-flop unit is closed prior to onset of the postamble ringing.

Claims11

Dependent claims

A data input device for writing data into a memory device, comprising:

a combinational logic circuit for receiving an external data strobe signal and for outputting a first data strobe signal and a second data strobe signal in response to the external data strobe signal;
a buffer for receiving the data and for outputting internal data to a flip-flop unit;
and
the flip-flop unit for storing the internal data in synchronization with the first data strobe signal and for outputting the stored data in synchronization with the second data strobe signal;
wherein the first data strobe signal is generated by delaying the external data strobe signal for a first predetermined time;
wherein a last falling edge of the second data strobe signal is generated by delaying a last falling edge of the first data strobe signal for a second predetermined time, and a last rising edge of the second data strobe signal, which follows the last falling edge of the second strobe signal, is generated by delaying the last falling edge of the second data strobe signal for a third predetermined time;
and
wherein the last rising edge of the second data strobe signal is generated prior to onset of a postamble ringing on the external data strobe signal.

5 more elements

A method of writing data into a memory device comprising:

receiving the data and an external data strobe signal from a memory controller;
delaying the external strobe signal for a first predetermined time to generate a first data strobe signal;
generating a second data strobe signal in response to the first data strobe signal, wherein a second predetermined time is between a last falling edge of the second data strobe signal and a last falling edge of the first data strobe signal, and a third predetermined time is between a last rising edge of the second data strobe signal and the last falling edge of the second data strobe signal;
writing the received data into the memory device in synchronization with the second data strobe signal;
and
closing a data transferred path in response to the last rising edge of the second data strobe signal;
wherein the last rising edge of the second data strobe signal is generated prior to onset of a postamble ringing on the external data strobe signal.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/451,824Filed 20 Apr 2012 · us provisional application
Priority: 22 Apr 2011
Published: US 2012/0269008 A125 Oct 2012
Granted: 29 Oct 2013
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

G11C 7/02
Arrangements for writing information into, or reading information out from, a digital store: with means for avoiding parasitic signals
G11C 7/1072
Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers: for memories with random access ports…
G11C 7/1096
Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits: write circuits, e.g.…
G11C 7/222
Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management: clock generating, synchronizing or…