# US 8,570,777 B2 · Power supply circuit with spike suppression circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,570,777 B2 - Document ID: US8570777B2 - Status: Granted - Kind: B2 - Application number: 13/207,342 - Filed: 2011-08-10 - Published: 2012-12-27 - Granted: 2013-10-29 - Earliest claimed: 2011-06-24 - Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.; Hon Hai Precision Industry Co., Ltd. - Applicants: Qi-Yan Luo; Song-Lin Tong; Peng Chen - Inventors: Qi-Yan Luo; Song-Lin Tong; Peng Chen - Web page: https://patentgrep.com/patent/US8570777B2 ## CPC - H02M 3/1584: {with a plurality of power processing stages connected in parallel} - H02M 1/34: Snubber circuits - H02M 1/342: {Active non-dissipative snubbers} - Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS ## Abstract A power supply circuit includes a pulse width modulation (PWM) chip, a number of phase circuits, a voltage output end, and a spike suppression circuit. The spike suppression circuit is connected to each of the phase circuits and the voltage output end. The PWM chip controls all of the phase circuits to alternately output power supply voltages according to a predetermined sequence. The spike suppression circuit receives the power supply voltages, and filters out voltage spikes in the power supply voltages, thereby outputting steady voltages to the voltage output end. ## Claims ### Claim 1 A power supply circuit, comprising: a pulse width modulation (PWM) chip; a plurality of phase circuits connected to the PWM chip; a voltage output end; and a spike suppression circuit connected to each of the plurality of the phase circuits and the voltage output end; wherein the PWM chip controls all of the phase circuits to alternately output power supply voltages according to a predetermined sequence, the spike suppression circuit receives the power supply voltages, and suppresses voltage spikes in the power supply voltages, thereby outputting steady voltages to the voltage output end. ### Claim 2 (depends on 1) The power supply circuit as claimed in claim 1, wherein each of the phase circuit includes a first metal-oxide-semiconductor field-effect transistor (MOSFET), a second MOSFET, and an inductor, a gate of the first MOSFET and a gate of the second MOSFET are both connected to the PWM chip, a source of the first MOSFET is grounded, a drain of the first MOSFET and a drain of the second MOSFET are both connected to a voltage input end via the inductor, a source of the second MOSFET is connected to the voltage output end, the voltage output end is grounded via a first capacitor. ### Claim 3 (depends on 2) The power supply circuit as claimed in claim 2, wherein the PWM chip includes a plurality of first control pins corresponding to the phase circuits, a plurality of second control pins corresponding to the phase circuits, gates of the first MOSFETs of all the phase circuits are respectively connected to their corresponding first control pin, gates of the second MOSFETs of all the phase circuits are respectively connected to their corresponding second control pin. ### Claim 4 (depends on 2) The power supply circuit as claimed in claim 2, wherein the drains of the second MOSFETs are used as output nodes, all of the output nodes are connected to the spike suppression circuit. ### Claim 5 (depends on 4) The power supply circuit as claimed in claim 4, wherein the spike suppression circuit includes a third MOSFET, a plurality of diodes corresponding to the phase circuits, a second capacitor, and a third capacitor, anodes of the diodes are respectively connected to their corresponding the output nodes, cathodes of the diodes are all connected to a source of the third MOSFET, the source of the third MOSFET is connected between one end of the second capacitor and one end of the third capacitor, the other end of the second capacitor and the other end of the third capacitor are both grounded, a gate of the third MOSFET is connected to one of the output nodes by a first resistor, a drain of the third MOSFET is connected to the voltage output end. ### Claim 6 (depends on 1) The power supply circuit as claimed in claim 1, further including a feedback circuit connected to the voltage output end and the PWM chip, wherein the feedback circuit samples a voltage of the voltage output end, and feedbacks the sampled voltage to the PWM chip, the PWM chip receives the sampled voltage, and turns on or off the power supply circuit according to the sampled voltage. ### Claim 7 (depends on 6) The power supply circuit as claimed in claim 6, wherein the PWM chip includes a feedback pin, the feedback circuit includes a second resistor and a third resistor, one end of the second resistor is connected to the voltage output end, the other end of the second resistor is connected between the feedback pin and one end of the third resistor, the other end of the third resistor is grounded.