# US 8,570,443 B2 · Image processing circuit and method thereof

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- Number: US 8,570,443 B2
- Document ID: US8570443B2
- Status: Granted
- Kind: B2
- Application number: 12/719,012
- Filed: 2010-03-08
- Published: 2010-12-16
- Granted: 2013-10-29
- Earliest claimed: 2009-06-11
- Assignees: Novatek Microelectronics Corp.
- Applicants: Teng-Yi Lin; Wei-Fu Chen; Wei-Jen Lo
- Inventors: Teng-Yi Lin; Wei-Fu Chen; Wei-Jen Lo
- Web page: https://patentgrep.com/patent/US8570443B2

## CPC

- H04N 7/0125: {one of the standards being a high definition standard}
- G06T 3/40: Scaling of whole images or parts thereof, e.g. expanding or contracting
- G06T 3/4092: Image resolution transcoding, e.g. by using client-server architectures
- G06T 5/73: Deblurring; Sharpening
- H04N 5/208: for compensating for attenuation of high frequency components, e.g. crispening, aperture distortion correction
- H04N 7/0117: {involving conversion of the spatial resolution of the incoming video signal (for graphics images G09G2340/0407)}
- G06T 2200/16: involving adaptation to the client's capabilities
- G06T 2207/10016: Video; Image sequence
- G06T 2207/20182: Noise reduction or smoothing in the temporal domain; Spatio-temporal filtering
- G09G 5/393: Arrangements for updating the contents of the bit-mapped memory
- G09G 2340/0407: Resolution change, inclusive of the use of different resolutions for different screen areas
- G09G 2360/10: Display system comprising arrangements, such as a coprocessor, specific for motion video images
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

An image processing circuit and a method thereof are provided herein. The image processing circuit has a first scaling circuit, a plurality of line buffers, a first sharpness circuit, a second scaling circuit, and a second sharpness circuit. The first scaling circuit enlarges an input image along a first direction to generate a first enlarged image. The line buffers temporarily store the pixel values of a plurality of pixel rows of the first enlarged image. The first sharpness circuit vertically sharpens the first enlarged image to generate a first sharpened image. The second scaling circuit enlarges the first sharpened image along a second direction to generate a second enlarged image. The second sharpness circuit horizontally sharpens the second enlarged image to generate a second sharpened image. Accordingly, it is possible to use the line buffers having shorter data lengths to perform the vertical sharpening.

## Claims

### Claim 1

An image processing circuit for processing an input image, the image processing circuit comprising:
a first scaling circuit, for increasing a vertical resolution of the input image to generate a first enlarged image;
a plurality of line buffers, coupled to the first scaling circuit, for temporally storing the pixel values of a plurality of pixel rows of the first enlarged image;
a first sharpness circuit, coupled to the line buffers, for vertically sharpening the first enlarged image to generate a first sharpened image;
a second scaling circuit, coupled to the first sharpness circuit, for increasing a horizontal resolution of the first sharpened image to generate a second enlarged image; and
a second sharpness circuit, coupled to the second scaling circuit, for horizontally sharpening the second enlarged image to generate a second sharpened image.

### Claim 2 (depends on 1)

The image processing circuit of claim 1, wherein when vertically sharpening the first enlarged image, the first sharpness circuit reads the pixel values of a pixel column of the first enlarged image from the line buffers, and calculates the pixel value of a corresponding pixel of the first sharpened image according to the pixel values of the pixel column.

### Claim 3 (depends on 1)

The image processing circuit of claim 1, wherein when horizontally sharpening the second enlarged image, the second sharpness circuit calculates the pixel value of a corresponding pixel of the second sharpened image according to the pixel values of a pixel row of the second enlarged image.

### Claim 4 (depends on 1)

The image processing circuit of claim 1, wherein a horizontal resolution of the first enlarged image is equal to a horizontal resolution of the input image, a vertical resolution of the first enlarged image is larger than the vertical resolution of the input image.

### Claim 5 (depends on 1)

The image processing circuit of claim 1, wherein a vertical resolution of the second enlarged image is equal to a vertical resolution of the first sharpened image, a horizontal resolution of the second enlarged image is larger than the horizontal resolution of the first sharpened image.

### Claim 6 (depends on 1)

The image processing circuit of claim 1, wherein the first enlarged image and the first sharpened image have the same resolution, the second enlarged image and the second sharpened image have the same resolution.

### Claim 7 (depends on 1)

The image processing circuit of claim 1, wherein the data length of each of the line buffers is equal to the data volume of the pixel values of a pixel row of the first enlarged image.

### Claim 8 (depends on 1)

The image processing circuit of claim 1, wherein the line buffers are first-in first-out (FIFO) buffers.

### Claim 9

An image processing method for processing an input image, the image processing method comprising:
inputting the input image to an image processing circuit;
increasing a vertical resolution of the input image to generate a first enlarged image by utilizing a first scaling circuit of the image processing circuit;
temporally storing the pixel values of a plurality of pixel rows of the first enlarged image into a plurality of line buffers;
vertically sharpening the first enlarged image to generate a first sharpened image by utilizing a first sharpness circuit of the image processing circuit;
increasing a horizontal resolution of the first sharpened image to generate a second enlarged image by utilizing a second scaling circuit of the image processing circuit; and
horizontally sharpening the second enlarged image to generate a second sharpened image by utilizing a second sharpness circuit of the image processing circuit.

### Claim 10 (depends on 9)

The image processing method of claim 9, wherein when vertically sharpening the first enlarged image, the first sharpness circuit reads the pixel values of a pixel column of the first enlarged image from the line buffers, and calculates the pixel value of a corresponding pixel of the first sharpened image according to the pixel values of the pixel column.

### Claim 11 (depends on 9)

The image processing method of claim 9, wherein when horizontally sharpening the second enlarged image, the second sharpness circuit calculates the pixel value of a corresponding pixel of the second sharpened image according to the pixel values of a pixel row of the second enlarged image.

### Claim 12 (depends on 9)

The image processing method of claim 9, wherein a horizontal resolution of the first enlarged image is equal to a horizontal resolution of the input image, a vertical resolution of the first enlarged image is larger than the vertical resolution of the input image.

### Claim 13 (depends on 9)

The image processing method of claim 9, wherein a vertical resolution of the second enlarged image is equal to a vertical resolution of the first sharpened image, a horizontal resolution of the second enlarged image is larger than the horizontal resolution of the first sharpened image.

### Claim 14 (depends on 9)

The image processing method of claim 9, wherein the first enlarged image and the first sharpened image have the same resolution, the second enlarged image and the second sharpened image have the same resolution.

### Claim 15 (depends on 9)

The image processing method of claim 9, wherein the data length of each of the line buffers is equal to the data volume of the pixel values of a pixel row of the first enlarged image.

### Claim 16 (depends on 9)

The image processing method of claim 9, wherein the line buffers are FIFO buffers.

### Claim 17

An image processing circuit for processing an input image, the image processing circuit comprising:
a first scaling circuit, for increasing a first resolution of the input image along a first direction to generate a first enlarged image;
a first sharpness circuit, coupled to the first scaling circuit, for vertically sharpening the first enlarged image to generate a first sharpened image;
a second scaling circuit, coupled to the first sharpness circuit, for increasing a second resolution of the first sharpened image along a second direction to generate a second enlarged image; and
a second sharpness circuit, coupled to the second scaling circuit, for horizontally sharpening the second enlarged image to generate a second sharpened image.

### Claim 18 (depends on 17)

The image processing circuit of claim 17, wherein the first direction is a vertical direction, the second direction is a horizontal direction, the first resolution of the input image is a vertical resolution of the input image, and the second resolution of the first sharpened image is a horizontal resolution of the first sharpened image.

### Claim 19 (depends on 18)

The image processing circuit of claim 18, wherein a horizontal resolution of the first enlarged image is equal to a horizontal resolution of the input image, a vertical resolution of the first enlarged image is larger than the vertical resolution of the input image.

### Claim 20 (depends on 18)

The image processing circuit of claim 18, wherein a vertical resolution of the second enlarged image is equal to a vertical resolution of the first sharpened image, a horizontal resolution of the second enlarged image is larger than the horizontal resolution of the first sharpened image.

### Claim 21 (depends on 17)

The image processing circuit of claim 17, further comprising:
a buffer, coupled to the first scaling circuit and the first sharpness circuit, for temporally storing the pixel values of a part of pixels of the first enlarged image.

### Claim 22 (depends on 21)

The image processing circuit of claim 21, wherein the buffer comprises a plurality of line buffers.

### Claim 23 (depends on 22)

The image processing circuit of claim 22, wherein the data length of each of the line buffers is equal to the data volume of the pixel values of a pixel row of the first enlarged image.

### Claim 24 (depends on 21)

The image processing circuit of claim 21, wherein the buffer is a FIFO buffer.

### Claim 25 (depends on 21)

The image processing circuit of claim 21, wherein when vertically sharpening the first enlarged image, the first sharpness circuit reads the pixel values of a pixel column of the first enlarged image from the buffer, and calculates the pixel value of a corresponding pixel of the first sharpened image according to the pixel values of the pixel column.

### Claim 26 (depends on 17)

The image processing circuit of claim 17, wherein when horizontally sharpening the second enlarged image, the second sharpness circuit calculates the pixel value of a corresponding pixel of the second sharpened image according to the pixel values of a pixel row of the second enlarged image.

### Claim 27 (depends on 17)

The image processing circuit of claim 17, wherein the first enlarged image and the first sharpened image have the same resolution, the second enlarged image and the second sharpened image have the same resolution.

### Claim 28

An image processing method for processing an input age, the image processing method comprising:
inputting the input image into an image processing circuit;
increasing a first resolution of the input image along a first direction to generate a first enlarged image by utilizing a first scaling circuit of the image processing circuit;
vertically sharpening the first enlarged image to generate a first sharpened image by utilizing a first sharpness circuit of the image processing circuit;
increasing a second resolution of the first sharpened image along a second direction to generate a second enlarged image by utilizing a second scaling circuit of the image processing circuit; and
horizontally sharpening the second enlarged image to generate a second sharpened image by utilizing a second sharpness circuit of the image processing circuit.

### Claim 29 (depends on 28)

The image processing method of claim 28, wherein the first direction is a vertical direction, the second direction is a horizontal direction, the first resolution of the input image is a vertical resolution of the input image, and the second resolution of the first sharpened image is a horizontal resolution of the first sharpened image.

### Claim 30 (depends on 29)

The image processing method of claim 29, wherein a horizontal resolution of the first enlarged image is equal to a horizontal resolution of the input image, a vertical resolution of the first enlarged image is larger than the vertical resolution of the input image.

### Claim 31 (depends on 29)

The image processing method of claim 29, wherein a vertical resolution of the second enlarged image is equal to a vertical resolution of the first sharpened image, a horizontal resolution of the second enlarged image is larger than the horizontal resolution of the first sharpened image.

### Claim 32 (depends on 28)

The image processing method of claim 28, further comprising:
temporally storing the pixel values of a plurality of pixel rows of the first enlarged image into a buffer of the image processing circuit.

### Claim 33 (depends on 32)

The image processing method of claim 32, wherein the buffer comprises a plurality of line buffers, the pixel values of the pixel rows of the first enlarged image are temporally stored into the line buffers.

### Claim 34 (depends on 33)

The image processing method of claim 33, wherein the data length of each of the line buffers is equal to the data volume of the pixel values of a pixel row of the first enlarged image.

### Claim 35 (depends on 32)

The image processing method of claim 32, wherein the buffer is a FIFO buffer.

### Claim 36 (depends on 32)

The image processing method of claim 32, wherein when vertically sharpening the first enlarged image, the first sharpness circuit reads the pixel values of a pixel column of the first enlarged image from the buffer, and calculates the pixel value of a corresponding pixel of the first sharpened image according to the pixel values of the pixel column.

### Claim 37 (depends on 28)

The image processing method of claim 28, wherein when horizontally sharpening the second enlarged image, the second sharpness circuit calculates the pixel value of a corresponding pixel of the second sharpened image according to the pixel values of a pixel row of the second enlarged image.

### Claim 38 (depends on 28)

The image processing method of claim 28, wherein the first enlarged image and the first sharpened image have the same resolution, the second enlarged image and the second sharpened image have the same resolution.
