# US 8,570,267 B2 · Display apparatus and method for driving same

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- Number: US 8,570,267 B2
- Document ID: US8570267B2
- Status: Granted
- Kind: B2
- Application number: 12/733,566
- Filed: 2008-09-09
- Published: 2010-08-05
- Granted: 2013-10-29
- Earliest claimed: 2007-10-04
- Assignees: Sharp Kabushiki Kaisha
- Applicants: Tomokazu Ohtsubo
- Inventors: Tomokazu Ohtsubo
- Web page: https://patentgrep.com/patent/US8570267B2

## CPC

- G09G 3/3666: {with the matrix divided into sections}
- G09G 3/30: using electroluminescent panels
- G09G 3/3677: {suitable for active matrices only}
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2310/0221: with use of split matrices (G09G3/3644 and G09G3/3666 take precedence)
- G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

In one embodiment of the present invention, an active matrix display apparatus includes a screen having a plurality of regions each provided with a gate driver, in each of which plurality of regions scanning lines are driven so as to be sequentially selected by use of timing of a gate clock signal supplied to the gate driver, wherein corresponding ones of the gate clock signals for some of the plurality of regions have respective different pulse widths. Thus, it is possible to realize a display apparatus including a screen having a plurality of regions, in which display apparatus a difference in brightness between ones of some of the plurality of regions can be prevented.

## Claims

### Claim 1

An active matrix display apparatus comprising:
a screen having a plurality of regions each provided with a gate driver, in each of which plurality of regions scanning lines are driven so as to be sequentially selected by use of timing of a gate clock signal individually supplied to the gate driver, wherein:
corresponding ones of the gate clock signals for some of the plurality of regions have respective different pulse widths, and
the gate driver generates a scanning signal so that the scanning signal has a same period between pulse-start timing and pulse-end timing as a period of the gate clock signal between pulse-end timing of a pulse and pulse-start timing of a following pulse.

### Claim 2 (depends on 1)

The active matrix display apparatus as set forth in claim 1, wherein:
the corresponding ones of the gate clock signals are identical in terms of pulse-end timing or pulse-start timing.

### Claim 3 (depends on 1)

The active matrix display apparatus as set forth in claim 1, wherein:
charge sharing between data signal lines is carried out during a horizontal blanking period.

### Claim 4

A method for driving an active matrix display apparatus including a screen having a plurality of regions each provided with a gate driver, the method comprising:
driving scanning lines in each of the plurality of regions so that the scanning lines are sequentially selected by use of timing of a gate clock signal individually supplied to the gate driver, wherein:
the scanning lines are driven in each of the plurality of regions so that corresponding ones of the gate clock signals for some of the plurality of regions have different pulse widths, and
the gate driver generates a scanning signal so that the scanning signal has a same period between pulse-start timing and pulse-end timing as a period of the gate clock signal between pulse-end timing and pulse-start timing.

### Claim 5 (depends on 4)

The method as set forth in claim 4, wherein:
the corresponding ones of the gate clock signals are identical in terms of pulse-end timing or pulse-start timing.

### Claim 6 (depends on 4)

The method as set forth in claim 4, wherein:
charge sharing between data signal lines is carried out during a horizontal blanking period.