# US 8,570,266 B2 · Display device and electronic apparatus using the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,570,266 B2 - Document ID: US8570266B2 - Status: Granted - Kind: B2 - Application number: 11/719,785 - Filed: 2005-12-05 - Published: 2009-06-11 - Granted: 2013-10-29 - Earliest claimed: 2004-12-06 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Hiroyuki Miyake - Inventors: Hiroyuki Miyake - Web page: https://patentgrep.com/patent/US8570266B2 ## CPC - G09G 3/3677: {suitable for active matrices only} - G11C 19/28: using semiconductor elements (G11C19/14, G11C19/36 take precedence) - G09G 3/2037: {with specific control of sub-frames corresponding to the least significant bits} - G09G 2310/0205: Simultaneous scanning of several lines in flat panels - G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays - G09G 2310/061: for resetting or blanking - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A display device with reduced power consumption, high definition, and a slim bezel. Both of a writing operation and an erasing operation are performed by one gate driver that is mainly constituted by a shift register for selecting a row and a control circuit for switching between a writing operation and an erasing operation. The switching of the control circuit is performed using an output signal of the shift register of the row, an output signal of the control circuit of the previous row, and an externally inputted signal. ## Claims ### Claim 1 A display device comprising: gate signal lines arranged in a plurality of rows; source signal lines arranged in a plurality of columns; a pixel portion including a plurality of pixels, each of the pixels being surrounded by two adjacent ones of the gate signal lines and two adjacent ones of the source signal lines; a source signal line driver circuit electrically connected to the source signal lines; and a gate signal line driver circuit electrically connected to the gate signal lines, wherein the gate signal line driver circuit includes a shift register and a latch circuit, the latch circuit comprising a plurality of stages, wherein each stage of the latch circuit comprises an RS latch circuit, wherein a given stage is configured to be inputted with a signal in accordance with an output of an RS latch circuit of a previous stage, wherein a first stage of the shift register is configured to be inputted with a clock signal, a first start pulse signal and a second start pulse signal, and to output a row selection pulse in accordance with the first start pulse signal and the second start pulse signal, wherein the latch circuit is configured to be inputted with the second start pulse signal, the row selection pulse, a first pulse width control signal, and a second pulse width control signal, and wherein the gate signal line driver circuit is configured to output one of a writing signal and an erasing signal to the gate signal lines, in accordance with the second start pulse signal, the row selection pulse, the first pulse width control signal, and the second pulse width control signal. ### Claim 2 A display device comprising: gate signal lines arranged in a plurality of rows; source signal lines arranged in a plurality of columns; a pixel portion including a plurality of pixels, each of the pixels being surrounded by two adjacent ones of the gate signal lines and two adjacent ones of the source signal lines; a source signal line driver circuit electrically connected to the source signal lines; and a gate signal line driver circuit electrically connected to the gate signal lines and comprising an input configured to receive a signal for starting an erasing operation, wherein the gate signal line driver circuit includes a shift register and a latch circuit comprising a plurality of stages, each stage comprising a control circuit for switching between outputting a writing signal, and outputting an erasing signal to one of the gate signal lines, wherein the switching is performed using an output of a control circuit corresponding to a row selected by the shift register, an output of a control circuit corresponding to a previous row, and a signal externally inputted to the control circuit, and wherein the shift register and the control circuit are each configured to be inputted with the signal for starting the erasing operation. ### Claim 3 (depends on 1, 2) The display device according to claim 1 or 2, wherein the display device is applied to an electronic apparatus selected from a group consisting of a mobile phone, a digital camera and a television receiver. ### Claim 4 (depends on 1) The display device according to claim 1, wherein each control circuit comprises a selector circuit, an RS latch circuit and an AND circuit, wherein in each control circuit: the selector circuit is configured to be inputted with outputs of the RS latch circuit, an output of the shift register, the first pulse width control signal and the second pulse width control signal, and the AND circuit is inputted with outputs of the selector circuit, and wherein an RS latch circuit of a first control circuit of a first stage of the latch circuit is inputted with an output of an AND circuit of a second control circuit of the previous stage. ### Claim 5 (depends on 1, 2) The display device according to claim 1 or 2, wherein the gate signal line driver circuit is provided on opposite sides of the pixel portion. ### Claim 6 (depends on 5) The display device according to claim 5, wherein each control circuit comprises a selector circuit, an RS latch circuit and an AND circuit, wherein in each control circuit: the selector circuit is configured to be inputted with outputs of the RS latch circuit, an output of the shift register, and the AND circuit is configured to be inputted with outputs of the selector circuit, and wherein an RS latch circuit of a first control circuit of a given stage of the latch circuit is inputted with an output of an AND circuit of a second control circuit of a previous stage. ### Claim 7 A display device comprising: a gate signal line; a source signal line; a pixel including a transistor, the transistor being electrically connected to the gate signal line and to the source signal line; a source signal line driver circuit electrically connected to the source signal line; and a gate signal line driver circuit electrically connected to the gate signal line and comprising a shift register and a latch circuit; wherein the shift register comprises a logic gate comprising a first input terminal and a second input terminal, the first input terminal and the second input terminal being configured to be inputted with a first signal input from outside of the gate signal line driver circuit and a second signal input from outside of the gate signal line driver circuit, respectively, and wherein the latch circuit comprises a circuit configured to perform a first logical AND operation between a signal outputted by the shift register and a third signal input from outside of the gate signal line driver circuit and a second logical AND operation between the signal transmitted by the output terminal of the shift register and a fourth signal input from outside of the gate signal line driver circuit. ### Claim 8 (depends on 7) The display device according to claim 7, wherein the gate signal line driver circuit is provided on opposite sides of a pixel portion including the pixel. ### Claim 9 (depends on 7) The display device according to claim 7, wherein the display device is applied to an electronic apparatus selected from a group consisting of a mobile phone, a digital camera and a television receiver. ### Claim 10 (depends on 7) The display device according to claim 7, wherein the first signal input from outside of the gate signal line driver circuit is a first start pulse signal, wherein the second signal input from outside of the gate signal line driver circuit is a second start pulse signal, wherein the third signal input from outside of the gate signal line driver circuit is a first pulse width control signal, and wherein the fourth signal input from outside of the gate signal line driver circuit is a second pulse width control signal. ### Claim 11 (depends on 7) The display device according to claim 7, wherein the latch circuit comprises stages each comprising an RS latch circuit, and wherein an RS latch circuit of a first stage is inputted with an output of a previous stage.