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US 8,570,109 B2Granted
Ring oscillator for generating oscillating clock signal
AssigneeHynix Semiconductor Inc.
InventorsTaek-Sang Song, Dae-Han Kwon, Dae-Kun Yoon
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Abstract
A ring oscillator including a plurality of buffer units, each of which has a cross-coupled structure, for generating clock signals using a bias voltage having a predetermined voltage level applied thereto, wherein the clock signals have a swing width corresponding to the bias voltage.
Claims8
A multi-phase clock correction circuit, comprising:
- an input unit for inputting reference phase clock signals, and
- an oscillator configured to receive a bias voltage having a predetermined voltage level and to correct phases of the signals received via the input unit to generate a multi-phase clock signal, wherein the multi-phase clock signal has a swing width corresponding to the bias voltage,
- wherein the oscillator includes a plurality of buffer units, each of which includes:
- a CML buffer circuit configured to differentially receive corresponding clock signals to differentially generate corresponding output signals, and
- a feedback circuit, provided at a differential output end of the CML buffer circuit, configured to perform a feedback operation.
2 more elements
Dependencies are inferred from the claim text.