Semiconductor integrated circuit
AssigneeHynix Semiconductor Inc.
InventorSang-Sic Yoon
Life of this patent
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Abstract
A semiconductor integrated circuit includes a first pad configured to receive a first voltage, a second pad configured to receive a second voltage, an internal voltage generation circuit configured to generate a third voltage having the same voltage level as the first voltage in response to the second voltage during a test mode, and an internal circuit configured to perform a normal operation using the first voltage and the second voltage during a normal mode and perform a test operation using the second voltage and the third voltage during the test mode.
Claims13
A semiconductor integrated circuit comprising:
- a first pad configured to receive a first voltage;
- a second pad configured to receive a second voltage;
- an internal voltage generation circuit configured to generate a third voltage having the same voltage level as the first voltage in response to the second voltage during a test mode;
- and
- an internal circuit configured to perform a normal operation using the first voltage and the second voltage during a normal mode and perform a test operation using the second voltage and the third voltage during the test mode.
A semiconductor integrated circuit comprising:
- a first pad configured to receive a first voltage;
- a second pad configured to receive a second voltage having a higher voltage level than the first voltage;
- an internal voltage generation circuit configured to generate a third voltage in response to the second voltage, wherein the third voltage has a lower voltage level than the first voltage during a normal mode and the same voltage level as the first voltage during a test mode;
- and
- an internal circuit configured to perform a normal operation using the first voltage to the third voltage during the normal mode and perform a test operation using the second voltage and the third voltage during the test mode.
A semiconductor integrated circuit comprising:
- a first pad configured to receive a first voltage in a normal mod of the semiconductor integrated circuit;
- a second pad configured to receive a second voltage in the normal mode and a test mode of the semiconductor integrated circuit;
- and
- an internal voltage generation circuit configured to generate a third voltage in response to the second voltage, wherein the third voltage has a lower voltage level than the first voltage during the normal mode and the same voltage level as the first voltage during the test mode.
Dependencies are inferred from the claim text.