Adaptive cascode circuit using MOS transistors
AssigneeSilergy Semiconductor Technology (Hangzhou) LTD
InventorsMichael Grimm, Jun Chen
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AssigneeSilergy Semiconductor Technology (Hangzhou) LTD
InventorsMichael Grimm, Jun Chen
Estimating the term…
The present invention relates to a cascode circuit using MOS transistors. In one embodiment, an adaptive cascode circuit can include: (i) a main MOS transistor; (ii) n adaptive MOS transistors coupled in series to the drain of the main MOS transistor, where n can be an integer greater than one; (iii) a shutdown clamping circuit connected to the gates of the n adaptive MOS transistors, where the shutdown clamping circuit may have (n+1) shutdown clamping voltages no larger than rated gate-drain voltages of the main MOS transistor and n adaptive MOS transistors; and (iv) n conduction clamping circuits coupled correspondingly to the gates of the adaptive MOS transistors, where the n conduction clamping circuits may have n conduction clamping voltages no larger than the conduction threshold voltages of the adaptive MOS transistors.
An adaptive cascode circuit, comprising:
Dependencies are inferred from the claim text.