Nano thick Pt metallization layer
AssigneenLight Photonics Corporation
InventorsShiguo Zhang, Sandrio Elim, Ling Bao
Life of this patent
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Abstract
A metallization layer for a semiconductor device includes a first layer made of Pt and having a thickness greater than or equal to 15 Å and less than or equal to 50 Å, and a second layer formed on the first layer and made of a plurality of metallic sub-layers such as Ti/Pt/Au. A semiconductor device fabricated from the metallization layer includes a semiconductor substrate having a top layer and mesa structure and corresponding surface for securing an insulating layer and a corresponding exposed surface, and wherein the metallization layer is deposited over the insulating layer and exposed surface. Methods for forming the metallization layer are also disclosed.
Claims9
A semiconductor device comprising:
- a semiconductor substrate including a top epi layer having a surface with first and second portions;
- an insulating layer formed on said first portion and selectively removed from said second portion;
- and
- a metallization layer deposited on said insulating layer and said second portion, said metallization layer including a first layer made of Pt and having a thickness greater than 0 Å and less than or equal to 50 Å and a second layer made of a plurality of metallic sub-layers, wherein said first layer is in direct contact with said second portion and said insulating layer.
An semiconductor unit comprising:
- a semiconductor layer;
- a metallization layer;
- and
- a layer of Pt having a thickness of greater than 0 Å and less than or equal to 50 Å directly joining at least a portion of said semiconductor layer and at least a portion of said metallization layer;
- wherein said layer of Pt directly contacts an adjoining layer of silicon dioxide.
Dependencies are inferred from the claim text.