# US 8,569,880 B2 · Multilayer printed wiring board

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- Number: US 8,569,880 B2
- Document ID: US8569880B2
- Status: Granted
- Kind: B2
- Application number: 12/869,841
- Filed: 2010-08-27
- Published: 2010-12-23
- Granted: 2013-10-29
- Earliest claimed: 2004-02-04
- Assignees: Ibiden Co., Ltd.
- Applicants: Yasushi Inagaki; Katsuyuki Sano
- Inventors: Yasushi Inagaki; Katsuyuki Sano
- Web page: https://patentgrep.com/patent/US8569880B2

## CPC

- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H05K 3/4608: {comprising an electrically conductive base or core}
- H10W 42/267: {Patterned shielding planes}
- H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04)
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/635: {Through-vias}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 70/685: comprising multiple insulating layers
- H10W 72/00: Interconnections or connectors in packages
- H05K 1/056: {the metal substrate being covered by an organic insulating layer}
- H05K 3/429: {Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers}
- H05K 3/4602: {characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated}
- H05K 3/4641: {having integrally laminated metal sheets or special power cores}
- H05K 2201/0352: Differences between the conductors of different layers of a multilayer
- H05K 2201/09536: Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
- H05K 2201/09736: Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
- H05K 2201/098: Special shape of the cross-section of conductors, e.g. very thick plated conductors
- H10W 44/209: {Vertical interconnections, e.g. vias}
- H10W 44/212: {Coaxial feed-throughs in substrates}
- H10W 72/072: {of bump connectors}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/90: Bond pads, in general
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

A multilayer printed wiring board in which interlayer insulation layer and conductive layer are formed on a multilayer core substrate composed of three or more layers, having through holes for connecting the front surface with the rear surface and conductive layers on the front and rear surfaces and conductive layer in the inner layer to achieve electric connection through via holes, the through holes being composed of power source through holes, grounding through holes and signal through holes connected electrically to a power source circuit or a grounding circuit or a signal circuit of an IC chip, when the power source through holes pass through the grounding conductive layer of the inner layer in the core substrate, of the power source through holes, at least a power source through hole just below the IC having no conductive circuit extending from the power source through hole in the grounding conductive layer.

## Claims

### Claim 1

A multilayer printed wiring board, comprising:
a multilayer core substrate comprising a first outer conductive layer formed on a first surface of the multilayered core substrate, a second outer conductive layer formed on a second surface of the multilayered core substrate, a first inner conductive layer formed between the first and second surfaces of the multilayered core substrate, a second inner conductive layer formed between the first and second surfaces of the multilayered core substrate, and a plurality of through holes connecting the first surface with the second surface,
wherein each of the first and second inner conductive layers has a thickness which is greater than thicknesses of the first and second outer conductive layers, the plurality of through holes includes a plurality of power source through holes connected to a power source circuit and a plurality of grounding through holes connected to a ground circuit, each of the first and second outer conductive layers includes a plurality of grounding conductive layer portions and a plurality of power source conductive layer portions such that the power source through holes are connected to the power source conductive layer portions in the first and second outer conductive layers, respectively, and that the grounding through holes are connected to the grounding conductive layer portions in the first and second outer conductive layers, respectively, and the power source through holes and the grounding through holes are alternately positioned such that each of the power source through holes is surrounded by adjacent ones of the grounding through holes and that each of the grounding through holes is surrounded by adjacent ones of the power source through holes.

### Claim 2

A multilayer printed wiring board, comprising:
a multilayer core substrate comprising a first conductive layer formed on a first surface of the multilayered core substrate, a second conductive layer formed on a second surface of the multilayered core substrate, a first inner conductive layer formed between the first and second surfaces of the multilayered core substrate, a second inner conductive layer formed between the first and second surfaces of the multilayered core substrate, and a plurality of through holes connecting the first surface with the second surface,
wherein each of the first and second inner conductive layers has a thickness which is greater than thicknesses of the first and second outer conductive layers, the plurality of through holes includes a plurality of power source through holes connected to a power source circuit and a plurality of grounding through holes connected to a ground circuit, each of the first and second outer conductive layers includes a plurality of grounding conductive layer portions and a plurality of power source conductive layer portions, and the power source through holes and the grounding through holes are alternately positioned such that each of the power source through holes is surrounded by adjacent ones of the grounding through holes and that each of the grounding through holes is surrounded by adjacent ones of the power source through holes.

### Claim 3 (depends on 1)

The multilayer printed wiring board according to claim 1, wherein the first inner conductive layer is a power source conductive layer, the plurality of power source through holes is not connected to the second inner conductive layer and has 70% or more power source through holes having no land portions extending from the power source through holes in the second inner conductive layer.

### Claim 4 (depends on 1)

The multilayer printed wiring board according to claim 1, wherein the second inner conductive layer is a grounding conductive layer, and the plurality of grounding through holes is not connected to the first inner conductive layer and includes 70% or more grounding through holes having no land portions extending from the grounding through holes in the first inner conductive layer.

### Claim 5 (depends on 1)

The multilayer printed wiring board according to claim 1, further comprising:
an interlayer insulation layer formed on the multilayer core substrate; and
a conductive layer formed on the interlayer insulation layer,
wherein the multilayer core substrate has at least one power source conductive layer, and the conductive layer on the interlayer insulation layer and the power source conductive layer in the multilayer core substrate satisfy α2<α1≦40 α2 where α1 represents a sum of thicknesses of the at least one power source conductive layer in said multilayer core substrate and α2 represents a thickness of the conductive layer on the interlayer insulation layer.

### Claim 6 (depends on 5)

The multilayer printed wiring board according to claim 5, wherein said α1 is in a relation of 1.2α2≦α1≦40 α2.

### Claim 7 (depends on 1)

The multilayer printed wiring board according to claim 1, further comprising a capacitor mounted on a surface of the multilayer printed wiring board.

### Claim 8 (depends on 1)

The multilayer printed wiring board according to claim 1, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the plurality of through holes includes through holes positioned directly below the IC chip and disposed in a form of a grid or in a staggered fashion.

### Claim 9 (depends on 1)

The multilayer printed wiring board according to claim 1, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the plurality of power source through holes and plurality of grounding through holes include through holes positioned directly below the IC chip and disposed alternately in a form of a grid or in a staggered fashion.

### Claim 10 (depends on 1)

The multilayer printed wiring board according to claim 1, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the power source through holes and the grounding through holes are disposed in a form of a grid or in a staggered fashion directly below the IC chip.

### Claim 11 (depends on 2)

The multilayer printed wiring board according to claim 2, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the power source through holes and the grounding through holes are disposed in a form of a grid or in a staggered fashion directly below the IC chip.

### Claim 12 (depends on 2)

The multilayer printed wiring board according to claim 2, wherein the first inner conductive layer is a power source conductive layer, and the plurality of power source through holes is not connected to the second inner conductive layer and has 70% or more power source through holes having no land portions extending from the Dower source through holes in the second inner conductive layer.

### Claim 13 (depends on 2)

The multilayer printed wiring board according to claim 2, wherein the second inner conductive layer is a grounding conductive layer, and the plurality of grounding through holes is not connected to the first inner conductive layer and includes 70% or more grounding through holes having no land portions extending from the grounding through holes in the first inner conductive layer.

### Claim 14 (depends on 2)

The multilayer printed wiring board according to claim 2, further comprising:
an interlayer insulation layer formed on the multilayer core substrate; and
a conductive layer formed on the interlayer insulation layer,
wherein the multilayer core substrate has at least one power source conductive layer, and the conductive layer on the interlayer insulation layer and the power source conductive layer in the multilayer core substrate satisfy α2<α1≦40 α2 where α1 represents a sum of thicknesses of the at least one power source conductive layer in said multilayer core substrate and α2 represents a thickness of the conductive layer on the interlayer insulation layer.

### Claim 15 (depends on 14)

The multilayer printed wiring board according to claim 14, wherein said α1 is in a relation of 1.2α2≦α1≦40α2.

### Claim 16 (depends on 2)

The multilayer printed wiring board according to claim 2, further comprising a capacitor mounted on a surface of the multilayer printed wiring board.

### Claim 17 (depends on 1)

The multilayer printed wiring board according to claim 1, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the plurality of through holes includes a plurality of signal through holes connected to a signal circuit of the IC chip.

### Claim 18 (depends on 2)

The multilayer printed wiring board according to claim 2, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the plurality of through holes includes a plurality of signal through holes connected to a signal circuit of the IC chip.
