# US 8,569,858 B2 · Semiconductor device including an active region and two layers having different stress characteristics

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- Number: US 8,569,858 B2
- Document ID: US8569858B2
- Status: Granted
- Kind: B2
- Application number: 11/613,326
- Filed: 2006-12-20
- Published: 2008-06-26
- Granted: 2013-10-29
- Earliest claimed: 2006-12-20
- Assignees: Freescale Semiconductor, Inc.
- Applicants: Brian A. Winstead; Vance H. Adams; Paul A. Grudowski
- Inventors: Brian A. Winstead; Vance H. Adams; Paul A. Grudowski
- Web page: https://patentgrep.com/patent/US8569858B2

## CPC

- H10D 62/113: {Isolations within a component, i.e. internal isolations}
- H10D 30/791: {Arrangements for exerting mechanical stress on the crystal lattice of the channel regions}
- H10D 30/792: {comprising applied insulating layers, e.g. stress liners}
- H10D 30/795: {being in lateral device isolation regions, e.g. STI}
- H10D 30/798: {being provided in or under the channel regions}
- H10D 84/0128: {Manufacturing their channels}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/83: of only insulated-gate FETs [IGFET]
- H10D 84/8311: {the IGFETs characterised by having different channel structures}
- H10D 86/01: Manufacture or treatment
- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

An integrated circuit includes a device including an active region of the device, where the active region of the device includes a channel region having a transverse and a lateral direction. The device further includes an isolation region adjacent to the active region in a traverse direction from the active region, where the isolation region includes a first region located in a transverse direction to the channel region. The isolation region further includes a second region located in a lateral direction from the first region. The first region of the isolation region is under a stress of a first type and the second region of the isolative region is one of under a lesser stress of the first type or of under a stress of a second type being opposite of the first type.

## Claims

### Claim 1

A semiconductor device comprising:
an active region including a first channel region, wherein:
the active region has a first edge abutting an isolation region, the first edge extending in a lateral direction and a second edge abutting the isolation region, the second edge extending in a transverse direction, wherein the second edge intersects the first edge;
the first channel region lies at the first edge and is spaced apart from the second edge; and
the first channel region extends in the transverse direction and the lateral direction;
a first layer overlying the active region, having a boundary, and having a first stress and a corresponding stress type; and
a second layer spaced apart from and not overlying the active region, and having a second stress that is less than the first stress or an opposite stress type from the corresponding stress type of the first stress,
wherein from a top view and along the boundary of the first layer, the first layer extends away a first distance in the transverse direction from the second edge of the active region and the first layer extends away a second distance in the transverse direction from the first edge at the first channel region, wherein the first distance is larger than the second distance.

### Claim 2 (depends on 1)

The semiconductor device of claim 1 wherein the first stress is a compressive stress.

### Claim 3 (depends on 1)

The semiconductor device of claim 1 wherein the second stress is a tensile stress.

### Claim 4 (depends on 1)

The semiconductor device of claim 1 wherein the active region is a P-MOS region.

### Claim 5 (depends on 1)

The semiconductor device of claim 1 wherein:
the active region further comprises a third edge abutting the isolation region, the third edge extending in the transverse direction that intersects the first edge; and
from the top view,
the first channel region is disposed between the second and third edges of the active region;
from a top view and along the boundary of the first layer, the first layer extends away a third distance in the transverse direction from the third edge of the active region, wherein the third distance is larger than the second distance.

### Claim 6 (depends on 1)

The semiconductor device of claim 1 wherein the boundary extends:
a second distance in the lateral direction from a point along the boundary closest to the second edge, as measured in the transverse direction, to a first intermediate point farther from the second edge of the active region;
a third distance in the transverse direction from the first intermediate point to a second intermediate point;
in the lateral direction from the second intermediate point to another point along the boundary closer to the first channel region.

### Claim 7 (depends on 1)

The semiconductor device of claim 1 wherein the first layer and the second layer are characterized as etch-stop layers.

### Claim 8 (depends on 1)

The semiconductor device of claim 1 wherein the first layer is made of a silicon nitride material and the second layer is made of a silicon nitride material.

### Claim 9

A semiconductor device comprising:
an active region including a first channel region, wherein:
the active region has a first edge abutting an isolation region, the first edge extending in a lateral direction and a second edge abutting the isolation region, the second edge extending in a transverse direction, wherein the second edge intersects the first edge;
the first channel region lies at the first edge and is spaced apart from the second edge; and
the first channel region extends in the transverse direction and the lateral direction;
a first layer spaced apart from and not overlying the active region, having a boundary, and having a first stress and a corresponding stress type; and
a second layer overlying the active region, and having a second stress that is less than the first stress or an opposite stress type from the corresponding stress type of the first stress,
wherein from a top view and along the boundary of the first layer, the first layer extends away a first distance in the transverse direction from the second edge of the active region and the first layer extends away a second distance in the transverse direction from the first edge at the first channel region, wherein the first distance is smaller than the second distance.

### Claim 10 (depends on 9)

The semiconductor device of claim 9 wherein the first stress is a compressive stress, and the second stress is a tensile stress.

### Claim 11 (depends on 10)

The semiconductor device of claim 10 wherein the active region is an N-MOS region.

### Claim 12 (depends on 10)

The semiconductor device of claim 10 further comprising a P-MOS region spaced apart from the active region, wherein the first layer overlies the P-MOS region, and the second layer is spaced apart from and does not overlie the P-MOS region.

### Claim 13 (depends on 12)

The semiconductor device of claim 12 wherein the P-MOS region includes a first channel region, wherein:
the P-MOS region has a first edge abutting an isolation region, the first edge extending in the lateral direction and a second edge abutting the isolation region, the second edge extending in the transverse direction, wherein the first edge of the P-MOS region intersects the second edge of the P-MOS region;
the first channel region of the P-MOS region lies at the first edge of the P-MOS region and is spaced apart from the second edge of the P-MOS region;
the first channel region of the P-MOS region extends in the transverse direction and the lateral direction;
wherein from the top view and along the boundary of the first layer, the first layer extends away a third distance in the transverse direction from the first edge of the P-MOS region at the first channel region of the P-MOS region and the first layer extends away a fourth distance in the transverse direction from the second edge of the P-MOS region, wherein the fourth distance is larger than the third distance.

### Claim 14 (depends on 13)

The semiconductor device of claim 13 wherein:
the P-MOS region further includes a second channel region extending in the transverse and lateral directions: and
the second channel region of the P-MOS region is spaced apart in a lateral direction from the first channel region of the P-MOS region.

### Claim 15 (depends on 14)

The semiconductor device of claim 14 wherein, in the transverse direction, the first and second channel regions of the P-MOS region are substantially a same distance from the boundary of the first layer.

### Claim 16 (depends on 14)

The semiconductor device of claim 14 wherein:
the active region further includes a second channel region extending in the transverse and lateral directions: and
the second channel region of the active region is spaced apart in the lateral direction from the first channel region of the active region.

### Claim 17 (depends on 16)

The semiconductor device of claim 16 wherein, in the transverse direction, the first and second channel regions of the active region are substantially a same distance from the boundary of the first layer.

### Claim 18 (depends on 16)

The semiconductor device of claim 16 wherein, in the transverse direction, the first and second channel regions of the active region are substantially a same distance from the boundary of the first layer.

### Claim 19 (depends on 9)

The semiconductor device of claim 9 wherein the first layer and the second layer are characterized as etch-stop layers.

### Claim 20 (depends on 9)

The semiconductor device of claim 9 wherein the first layer is made of a silicon nitride material and the second layer is made of a silicon nitride material.

### Claim 21 (depends on 9)

The semiconductor device of claim 9 wherein:
the active region further includes a second channel region extending in the transverse and lateral directions: and
the second channel region of the active region is spaced apart in the lateral direction from the first channel region of the active region.

### Claim 22 (depends on 9)

The semiconductor device of claim 9 wherein the boundary extends:
a second distance in the lateral direction from a point along the boundary closest to the second edge, as measured in the transverse direction, to a first intermediate point farther from the second edge of the active region;
a third distance in the transverse direction from the first intermediate point to a second intermediate point;
in the lateral direction from the second intermediate point to another point along the boundary further from the second edge of the active region.