# US 8,569,843 B2 · Semiconductor device

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- Number: US 8,569,843 B2
- Document ID: US8569843B2
- Status: Granted
- Kind: B2
- Application number: 13/689,397
- Filed: 2012-11-29
- Published: 2013-04-11
- Granted: 2013-10-29
- Earliest claimed: 2008-10-21
- Assignees: Panasonic Corporation
- Applicants: Panasonic Corporation
- Inventors: Manabu Yanagihara; Kazushi Nakazawa; Tatsuo Morita; Yasuhiro Uemoto
- Web page: https://patentgrep.com/patent/US8569843B2

## CPC

- H10D 84/83: of only insulated-gate FETs [IGFET]
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 62/126: {Top-view geometrical layouts of the regions or the junctions}
- H10D 64/411: {for FETs}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/212: {Top-view shapes or dispositions, e.g. top-view layouts of the vias}
- H10W 20/2125: {Top-view shapes}
- H10W 20/484: {Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes}
- H10D 30/6738: {Schottky barrier electrodes}
- H10D 30/675: {Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium}
- H10D 62/8325: {Silicon carbide}
- H10D 62/85: being Group III-V materials, e.g. GaAs
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/254: {for lateral devices wherein the source or drain electrodes extend entirely through the semiconductor bodies, e.g. via-holes for back side contacts}
- H10D 64/64: Electrodes comprising a Schottky barrier to a semiconductor
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A bidirectional switch includes a plurality of unit cells 11 including a first ohmic electrode 15, a first gate electrode 17, a second gate electrode 18, and a second ohmic electrode 16. The first gate electrodes 15 are electrically connected via a first interconnection 31 to a first gate electrode pad 43. The second gate electrodes 18 are electrically connected via a second interconnection 32 to a second gate electrode pad 44. A unit cell 11 including a first gate electrode 17 having the shortest interconnect distance from the first gate electrode pad 43 includes a second gate electrode 18 having the shortest interconnect distance from the second gate electrode pad 44.

## Claims

### Claim 1

A semiconductor device comprising:
a plurality of unit cells including a semiconductor layer formed on a substrate, and a first ohmic electrode, a first gate electrode, and a second ohmic electrode formed on the semiconductor layer, the first gate electrode being between the first ohmic electrode and the second ohmic electrode;
a first gate electrode pad electrically connected to the first gate electrode;
a first ohmic electrode pad electrically connected to the first ohmic electrode; and
a second ohmic electrode pad electrically connected to the second ohmic electrode, wherein
a portion of the first ohmic electrode and a portion of the second ohmic electrode are overlapped by the first ohmic electrode pad in plan view, and
a portion of the first ohmic electrode and a portion of the second ohmic electrode are overlapped by the second ohmic electrode pad in plan view.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, further comprising:
a second gate electrode being between the first ohmic electrode and the second ohmic electrode; and
a second gate electrode pad electrically connected to the second gate electrode.

### Claim 3 (depends on 2)

The semiconductor device of claim 2, wherein,
a portion of the first gate electrode and a portion of the second gate electrode are overlapped by the first ohmic electrode pad in plan view, and
a portion of the first gate electrode and a portion of the second gate electrode are overlapped by the second ohmic electrode pad in plan view.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein
a portion of the first gate electrode is overlapped by the first gate electrode pad.

### Claim 5 (depends on 2)

The semiconductor device of claim 2, wherein
a portion of the first gate electrode is overlapped by the first gate electrode pad, and
a portion of the second gate electrode is overlapped by the second gate electrode pad.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein
the semiconductor layer has an active region and a high-resistance region surrounding the active region, and
at least a portion of the first and second ohmic electrode pads is formed on the active region.

### Claim 7 (depends on 6)

The semiconductor device of claim 6, wherein at least a portion of the first gate electrode pad is formed on the active region.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein
the semiconductor layer includes a first nitride semiconductor layer and a second nitride semiconductor layer having a larger band gap than that of the first nitride semiconductor layer,
the first and second nitride semiconductor layers being successively formed, and
the first nitride semiconductor layer being closer to the substrate than the second nitride semiconductor layer is.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein
a portion of the first ohmic electrode and a portion of the second ohmic electrode are overlapped by the first gate electrode pad in plan view.

### Claim 10 (depends on 2)

The semiconductor device of claim 2, wherein
a portion of the first ohmic electrode and a portion of the second ohmic electrode are overlapped by the first gate electrode pad in plan view.

### Claim 11 (depends on 10)

The semiconductor device of claim 10, wherein
a portion of the first ohmic electrode and a portion of the second ohmic electrode are overlapped by the second gate electrode pad in plan view.