# US 8,569,839 B2 · Semiconductor device and manufacturing method thereof

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- Number: US 8,569,839 B2
- Document ID: US8569839B2
- Status: Granted
- Kind: B2
- Application number: 13/010,417
- Filed: 2011-01-20
- Published: 2011-07-21
- Granted: 2013-10-29
- Earliest claimed: 2010-01-20
- Assignees: Renesas Electronics Corporation
- Applicants: Katsumi Morii; Yoshitaka Otsu; Kazuma Onishi; Tetsuya Nitta; Tatsuya Shiromoto; Shigeo Tokumitsu
- Inventors: Katsumi Morii; Yoshitaka Otsu; Kazuma Onishi; Tetsuya Nitta; Tatsuya Shiromoto; Shigeo Tokumitsu
- Web page: https://patentgrep.com/patent/US8569839B2

## CPC

- H10P 90/1906: {Preparing SOI wafers}
- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10W 10/0145: {of trenches having shapes other than rectangular or V-shape (H10W10/0143 takes precedence)}
- H10W 10/061: {using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W 10/181: {Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers}
- H10D 84/0188: {Manufacturing their isolation regions}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10P 74/277: {Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

To provide a semiconductor device that can be manufactured using a simple process without ensuring a high embedding property; and a manufacturing method of the device. In the manufacturing method of the semiconductor device according to the invention, a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention is prepared first. Then, an element having a conductive portion is completed over the main surface of the semiconductor layer. A trench encompassing the element in a planar view and reaching the buried insulating film from the main surface of the semiconductor layer is formed. A first insulating film (interlayer insulating film) is formed over the element and in the trench to cover the element and form an air gap in the trench, respectively. Then, a contact hole reaching the conductive portion of the element is formed in the first insulating film.

## Claims

### Claim 1

A manufacturing method of a semiconductor device, comprising the steps of:
preparing a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention;
completing an element having a conductive portion over the main surface of the semiconductor layer;
forming a trench encompassing the element therewith in a planar view so that the trench reaches the buried insulating film from the main surface of the semiconductor layer;
forming a first insulating film over the element and in the trench to cover the element and form an air gap in the trench, respectively; and
forming, in the first insulating film, a hole reaching the conductive portion of the element.

### Claim 2 (depends on 1)

The manufacturing method of a semiconductor device according to claim 1, further comprising a step of forming an element isolation insulating film over the main surface of the semiconductor layer,
wherein the trench penetrates through the element isolation insulating film and reaches the buried insulating film.

### Claim 3 (depends on 1, 2)

The manufacturing method of a semiconductor device according to claim 1 or 2, further comprising, prior to the formation of the trench, the steps of:
forming a second insulating film over the main surface of the semiconductor layer to cover the element therewith,
forming a third insulating film made of a material different from the material of the second insulating film; and
forming a fourth insulating film made of a material different from the material of the third insulating film,
wherein the trench formation step further comprises a step of selectively removing the semiconductor layer with the fourth insulating film as a mask, and
wherein the manufacturing method further comprises a step of removing the fourth and third insulating films after formation of the trench.

### Claim 4 (depends on 1, 2)

The manufacturing method of a semiconductor device according to claim 1 or 2, further comprising, after formation of the trench but prior to the formation of the first insulating film, a step of forming a sidewall insulating film over the side surface of the trench.

### Claim 5

A semiconductor device, comprising:
a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention;
an element formed over the main surface of the semiconductor layer and having a conductive portion;
a trench formed in the semiconductor layer so that the trench encompasses the element therewith in a planar view and reaches the buried insulating film from the main surface of the semiconductor layer; and
a first insulating film formed over the element and in the trench to cover the element and form an air gap in the trench, respectively,
wherein the first insulating film has a hole reaching the conductive portion.