# US 8,569,836 B2 · Semiconductor device

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- Number: US 8,569,836 B2
- Document ID: US8569836B2
- Status: Granted
- Kind: B2
- Application number: 13/307,218
- Filed: 2011-11-30
- Published: 2012-07-12
- Granted: 2013-10-29
- Earliest claimed: 2011-01-12
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Mueng-Ryul Lee
- Inventors: Mueng-Ryul Lee
- Web page: https://patentgrep.com/patent/US8569836B2

## CPC

- H10D 84/401: {Combinations of FETs or IGBTs with BJTs}
- H10D 30/0281: {of lateral DMOS [LDMOS] FETs}
- H10D 30/65: Lateral DMOS [LDMOS] FETs
- H10D 62/157: {Impurity concentrations or distributions}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 89/815: {involving a parasitic bipolar transistor triggered by the local electrical biasing of the layer acting as base region of said parasitic bipolar transistor}
- H10D 10/40: Vertical BJTs {(Vertical Heterojunction BJTs H10D10/821)}
- H10D 62/109: {Reduced surface field [RESURF] PN junction structures}
- H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device includes an output port that has a first lateral double diffused metal oxide semiconductor (LDMOS) device and an electrostatic discharge protection device that has a second LDMOS device and a bipolar transistor and that protects the output port from electrostatic discharge. A breakdown voltage of the second LDMOS device is equal to or lower than a breakdown voltage of the first LDMOS device.

## Claims

### Claim 1

A semiconductor device, comprising:
an output port including a first lateral double diffused metal oxide semiconductor (LDMOS) device; and
an electrostatic discharge protection device that includes a second LDMOS device and a bipolar transistor and that protects the output port from electrostatic discharge,
a breakdown voltage of the second LDMOS device being equal to or lower than a breakdown voltage of the first LDMOS device.

### Claim 2 (depends on 1)

The semiconductor device as claimed in claim 1, wherein the first LDMOS device includes:
a first gate on a substrate,
a first source region at one side of the first gate, the first source region having a first conductivity type,
a first body region under the first source region and surrounding the first source region, the first body region having a second conductivity type, the second conductivity type being different from the first conductivity type,
a first body contact region in the first body region, the first body contact region having the second conductivity type,
a first drain region at another side of the first gate, the first drain region having the first conductivity type,
a first isolation region in the substrate between the first source region and the first drain region, the first isolation region overlapping a portion of the first gate,
a first deep well under the first body region, the first deep well having the second conductivity type, and
a first buried layer under the first deep well, the first buried layer having the first conductivity type.

### Claim 3 (depends on 2)

The semiconductor device as claimed in claim 2, wherein the second LDMOS device includes:
a second gate on the substrate,
a second body region at one side of the second gate, the second body region having the second conductivity type,
a second body contact region in the second body region, the second body contact region having the second conductivity type,
a second drain region at another side of the second gate, the second drain region having the first conductivity type,
a second isolation region in the substrate between the second body region and the second drain region, the second isolation region overlapping a portion of the second gate,
a second deep well under the second body region, the second deep well having the second conductivity type, and
a second buried layer under the second deep well, the second buried layer having the first conductivity type.

### Claim 4 (depends on 3)

The semiconductor device as claimed in claim 3, wherein the second LDMOS device includes a second source region in the second body region, the second source region having the first conductivity type.

### Claim 5 (depends on 3)

The semiconductor device as claimed in claim 3, wherein the bipolar transistor includes:
an emitter region spaced apart from the second body region, the emitter region having the first conductivity type,
a base region under the emitter region and surrounding the emitter region, the base region having the second conductivity type, and
the second drain region.

### Claim 6 (depends on 5)

The semiconductor device as claimed in claim 5, wherein the bipolar transistor includes an epitaxial layer under the base region.

### Claim 7 (depends on 5)

The semiconductor device as claimed in claim 5, wherein the base region is in a non-overlapping relationship with the second deep well.

### Claim 8 (depends on 5)

The semiconductor device as claimed in claim 5, wherein a doping concentration of the base region is higher than a doping concentration of the second deep well and lower than a doping concentration of the second body region.

### Claim 9 (depends on 5)

The semiconductor device as claimed in claim 5, wherein a first distance from a bottom surface of the substrate to a bottom surface of the base region is greater than a second distance from the bottom surface of the substrate to a bottom surface of the second body region.

### Claim 10 (depends on 5)

The semiconductor device as claimed in claim 5, wherein:
the first LDMOS device includes a first drift region that is under the first isolation region and the first drain region and that surrounds the first isolation region and the first drain region, the first drift region having the first conductivity type, and
the second LDMOS device includes a second drift region that is under the second isolation region and the second drain region and that surrounds the second isolation region and the second drain region, the second drift region having the first conductivity type.

### Claim 11 (depends on 5)

The semiconductor device as claimed in claim 5, wherein a length of the second isolation region is equal to or smaller than a length of the first isolation region.

### Claim 12 (depends on 5)

The semiconductor device as claimed in claim 5, wherein a second overlapping length between the second isolation region and the second deep well is equal to or greater than a first overlapping length between the first isolation region and the first deep well.

### Claim 13 (depends on 5)

The semiconductor device as claimed in claim 5, wherein a portion of the base region and a portion of the second deep well overlap each other.

### Claim 14 (depends on 13)

The semiconductor device as claimed in claim 13, wherein substantially an entire area of the base region is in a non-overlapping relationship with the second deep well.

### Claim 15 (depends on 3)

The semiconductor device as claimed in claim 3, wherein the bipolar transistor includes:
an emitter region in the second body region, the emitter region having the first conductivity type,
the second body region surrounding the emitter region, and
the second drain region.