# US 8,569,824 B2 · Semiconductor device and fabrication method for the same

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- Number: US 8,569,824 B2
- Document ID: US8569824B2
- Status: Granted
- Kind: B2
- Application number: 12/360,488
- Filed: 2009-01-27
- Published: 2009-07-30
- Granted: 2013-10-29
- Earliest claimed: 2008-01-30
- Assignees: Panasonic Corporation
- Applicants: Nobuyoshi Takahashi; Ichirou Matsuo
- Inventors: Nobuyoshi Takahashi; Ichirou Matsuo
- Web page: https://patentgrep.com/patent/US8569824B2

## CPC

- H10B 43/30: characterised by the memory core region
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

The semiconductor device includes: a plurality of bit lines formed in stripes in a semiconductor substrate of a first conductivity type, each of the bit lines being a diffusion layer of an impurity of a second conductivity type; a plurality of gate insulation films formed on regions of the semiconductor substrate between the bit lines; a plurality of word lines formed on the semiconductor substrate via the gate insulating films, the word lines extending in a direction intersecting with the bit lines; and a plurality of bit line isolation diffusion layers formed in regions of the semiconductor substrate between the word lines, each of the bit line isolation diffusion layers being a diffusion layer of an impurity of the first conductivity type. The bit line isolation diffusion layer includes a diffusion suppressor for suppressing diffusion of an impurity.

## Claims

### Claim 1

A semiconductor device comprising:
a plurality of bit lines formed in stripes in a semiconductor substrate of a first conductivity type, each of the bit lines being a diffusion layer of an impurity of a second conductivity type;
a plurality of gate insulation films formed on regions of the semiconductor substrate between the plurality of bit lines;
a plurality of word lines formed on the semiconductor substrate via the gate insulating films, the word lines extending in a direction intersecting with the plurality of bit lines; and
a plurality of bit line isolation diffusion layers formed in regions of the semiconductor substrate between the plurality of word lines, each of the bit line isolation diffusion layers being a diffusion layer of an impurity of the first conductivity type and including a first diffusion suppressor for suppressing diffusion of an impurity,
wherein the first diffusion suppressor is a different element from the impurity of the first conductivity type, and
the first diffusion suppressor is formed shallower than the impurity of the first conductivity type.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first diffusion suppressor is included in regions of the gate insulating films in contact with side edges of the word lines.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein each of the gate insulating films is composed of an ONO film having a lower oxide film, a nitride film and an upper oxide film formed one upon another sequentially.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein each of the gate insulating films is composed of an ONO film having a lower oxide film, a nitride film and an upper oxide film formed one upon another sequentially, and
the first diffusion suppressor segregates in the upper oxide film.

### Claim 5 (depends on 1)

The semiconductor device of claim 1,
wherein each of the bit lines includes a second diffusion suppressor for suppressing diffusion of an impurity.

### Claim 6 (depends on 5)

The semiconductor device of claim 5, wherein each of the word lines comprises:
a plurality of lower conductive films formed on the gate insulating films; and
an upper conductive film formed on the plurality of lower conductive films for electrically connecting the plurality of lower conductive films with each other.

### Claim 7 (depends on 5)

The semiconductor device of claim 5, wherein the second diffusion suppressor is nitrogen; and
the second diffusion suppressor is included in regions of the gate insulating films adjacent to the bit lines.

### Claim 8 (depends on 6)

The semiconductor device of claim 6, wherein each of the gate insulating films is composed of an ONO film having a lower oxide film, a nitride film and an upper oxide film formed one upon another sequentially;
the second diffusion suppressor is nitrogen; and
the nitride film includes the second diffusion suppressor.

### Claim 9 (depends on 8)

The semiconductor of claim 8, wherein the second diffusion suppressor segregates in the upper oxide film.

### Claim 10 (depends on 1)

The semiconductor device of claim 1, wherein the first diffusion suppressor includes at least one of nitrogen, fluorine, carbon, indium, germanium and silicon.

### Claim 11 (depends on 5)

The semiconductor device of claim 5, wherein the second diffusion suppressor includes at least one of nitrogen, fluorine, carbon, indium, germanium and silicon.