# US 8,569,765 B2 · MOSFET-Schottky rectifier-diode integrated circuits with trench contact structures > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,569,765 B2 - Document ID: US8569765B2 - Status: Granted - Kind: B2 - Application number: 13/186,619 - Filed: 2011-07-20 - Published: 2013-01-24 - Granted: 2013-10-29 - Earliest claimed: 2011-07-20 - Assignees: Force Mos Technology Co., Ltd. - Applicants: Fu-Yuan Hsieh - Inventors: Fu-Yuan Hsieh - Web page: https://patentgrep.com/patent/US8569765B2 ## CPC - H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors} - H10D 8/60: Schottky-barrier diodes - H10D 8/605: {of the trench conductor-insulator-semiconductor barrier type, e.g. trench MOS barrier Schottky rectifiers [TMBS]} - H10D 30/665: {having edge termination structures} - H10D 84/144: {in antiparallel diode configurations} - H10D 84/146: {the built-in components being Schottky barrier diodes} - H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors} - H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions} - H10D 62/112: {for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers} - H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions} - H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs} - H10D 62/157: {Impurity concentrations or distributions} - H10D 64/111: {Field plates} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A trench MOSFET device with embedded Schottky rectifier, Gate-Drain and Gate-Source clamp diodes on single chip is formed to achieve device shrinkage and performance improvement. The present semiconductor devices achieve low Vf and reverse leakage current for embedded Schottky rectifier, have overvoltage protection for Gate-Source clamp diode and avalanche protection for Gate-Drain clamp diode. ## Claims ### Claim 1 An integrated circuit comprising: a substrate of a first conductivity type; an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower doping concentration than said substrate; a trench MOSFET comprising a plurality of trenched gates surrounded by a source region of said first conductivity type encompassed in a body region of a second conductivity type; each said trenched gate comprising a conductive material padded by a gate oxide layer filled in a gate trench, wherein said gate oxide layer having a thick bottom oxide on bottom surface of said gate trench with a thickness greater than sidewall oxide along sidewall of said gate trench; a Schottky rectifier extending into said epitaxial layer and having a Schottky barrier layer lined in a trenched anode contact filled with a contact metal plug; a Gate-Drain clamp diode comprising multiple back to back poly-silicon Zener diodes with alternating doped regions of said first conductivity type next to said second conductivity type, connected with a gate metal on one side, and with a drain metal on another side through a plurality of metal stripes cross over a termination area; and a Gate-Source clamp diode comprising multiple back to back poly-silicon Zener diodes with alternating doped regions of said first conductivity type next to said second conductivity type, connected with said gate metal on one side, and with a source metal on another side. ### Claim 2 (depends on 1) The integrated circuit of claim 1 wherein: said Schottky rectifier being a trench Schottky rectifier having a Schottky barrier layer lined in said trenched anode contact filled with said contact metal plug and between a pair of adjacent said gate trenches. ### Claim 3 (depends on 1) The integrated circuit of claim 1 wherein: said Schottky rectifier being a Junction Barrier Schottky rectifier having a Schottky barrier layer lined in said trenched anode contact filled with said contact metal plug and between a pair of adjacent said body regions. ### Claim 4 (depends on 1) The integrated circuit of claim 1 wherein: said Schottky rectifier further comprising a Schottky barrier height enhancement region of said first conductivity type surrounding sidewalls and bottom of each said trenched anode contact in said epitaxial layer, said Schottky barrier height enhancement region having a doping concentration lower than said epitaxial layer. ### Claim 5 (depends on 1) The integrated circuit of claim 1 wherein: said Schottky rectifier further comprising a Schottky barrier height enhancement region of said second conductivity type surrounding sidewalls and bottom of each said trenched anode contact in said epitaxial layer. ### Claim 6 (depends on 1) The integrated circuit of claim 1 wherein: said Gate-Source clamp diode being connected to said source metal through a first trenched diode contact filled with said contact metal plug while being connected to said gate metal through a second trenched diode contact filled with said contact metal plug, said Gate-Drain clamp diode being connected to said gate metal through a third trenched diode contact filled with said contact metal plug while being connected to said drain metal through a forth trenched diode contact filled with said contact metal plug. ### Claim 7 (depends on 6) The integrated circuit of claim 6 further comprising an etch-buffer trenched gate in said epitaxial layer and underneath each of said first, second, third and forth trenched diode contacts, said etch-buffer trenched gate having same structure of said trenched gates in said trench MOSFET and serving as buffer layer for prevention of gate-body shortage. ### Claim 8 An integrated circuit comprising: a substrate of a first conductivity type; an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower doping concentration than said substrate; a trench MOSFET comprising a plurality of trenched gates surrounded by a source region of said first conductivity type encompassed in a body region of a second conductivity type; each said trenched gate comprising a conductive material padded by a gate oxide layer filled in a gate trench, wherein said gate oxide layer having a thick bottom oxide on bottom surface of said gate trench with a thickness greater than sidewall oxide along sidewall of said gate trench; a Schottky rectifier extending into said epitaxial layer and having a Schottky barrier layer lined in a trenched anode contact filled with a contact metal plug; and a Gate-Source clamp diode comprising multiple back to back poly-silicon Zener diodes with alternating doped regions of said first conductivity type next to said second conductivity type, connected with a gate metal on one side, and with a source metal on another side. ### Claim 9 (depends on 8) The integrated circuits of claim 8 wherein: said the Schottky rectifier being trench Schottky rectifier having a Schottky barrier layer lined in said trenched anode contact filled with said contact metal plug and between a pair of adjacent said gate trenches. ### Claim 10 (depends on 8) The integrated circuits of claim 8 wherein: said the Schottky rectifier being Junction Barrier Schottky rectifier having a Schottky barrier layer lined in said trenched anode contact filled with said contact metal plug and between a pair of adjacent said body regions. ### Claim 11 (depends on 8) The integrated circuits of claim 8 wherein: said Schottky rectifier further comprising a Schottky barrier height enhancement region of said first conductivity type surrounding sidewalls and bottom of each said trenched anode contact in said epitaxial layer, said Schottky barrier height enhancement region having a doping concentration lower than said epitaxial layer. ### Claim 12 (depends on 8) The integrated circuits of claim 8 wherein: said Schottky rectifier further comprising a Schottky barrier height enhancement region of said second conductivity type surrounding sidewalls and bottom of each said trenched anode contact in said epitaxial layer. ### Claim 13 (depends on 8) The integrated circuit of claim 8 wherein: said Gate-Source clamp diode being connected to said source metal through a first trenched diode contact filled with said contact metal plug while being connected to said gate metal through a second trenched diode contact filled with said contact metal plug. ### Claim 14 (depends on 13) The integrated circuits of claim 13 further comprising an etch-buffer trenched gate in said epitaxial layer and underneath each of said first and second trenched diode contacts, said etch-buffer trenched gate having same structure of said trenched gates in said trench MOSFET and serving as buffer layer for prevention of gate-body shortage. ### Claim 15 An integrated circuit comprising: a substrate of a first conductivity type; an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower doping concentration than said substrate; a trench MOSFET comprising a plurality of trenched gates surrounded by a source region of said first conductivity type encompassed in a body region of a second conductivity type; each said trenched gate comprising a conductive material padded by a gate oxide layer filled in a gate trench, wherein said gate oxide layer having a thick bottom oxide on bottom surface of said gate trench with a thickness greater than sidewall oxide along sidewall of said gate trench; a Schottky rectifier extending into said epitaxial layer and having a Schottky barrier layer lined in a trenched anode contact filled with a contact metal plug; and a Gate-Drain clamp diode comprising multiple back to back poly-silicon Zener diodes with alternating doped regions of said first conductivity type next to said second conductivity type, connected with a gate metal on one side, and with a drain metal on another side through a plurality of metal stripes cross over a termination area. ### Claim 16 (depends on 15) The integrated circuits of claim 15 wherein: said the Schottky rectifier being trench Schottky rectifier having a Schottky barrier layer lined in said trenched anode contact filled with said contact metal plug and between a pair of adjacent said gate trenches. ### Claim 17 (depends on 15) The integrated circuits of claim 15 wherein: said the Schottky rectifier being Junction Barrier Schottky rectifier having a Schottky barrier layer lined in said trenched anode contact filled with said contact metal plug and between a pair of adjacent said body regions. ### Claim 18 (depends on 15) The integrated circuits of claim 15 wherein: said Schottky rectifier further comprising a Schottky barrier height enhancement region of said first conductivity type surrounding sidewalls and bottom of each said trenched anode contact in said epitaxial layer, said Schottky barrier height enhancement region having a doping concentration lower than said epitaxial layer. ### Claim 19 (depends on 15) The integrated circuits of claim 15 wherein: said Schottky rectifier further comprising a Schottky barrier height enhancement region of said second conductivity type surrounding sidewalls and bottom of each said trenched anode contact in said epitaxial layer. ### Claim 20 (depends on 15) The integrated circuit of claim 15 wherein: said Gate-Drain clamp diode being connected to said gate metal through a first trenched diode contact filled with said contact metal plug while being connected to said drain metal through a second trenched diode contact filled with said contact metal plug. ### Claim 21 (depends on 20) The integrated circuits of claim 20 further comprising an etch-buffer trenched gate in said epitaxial layer and underneath each of said first and second trenched diode contacts, said etch-buffer trenched gate having same structure of said trenched gates in said trench MOSFET and serving as buffer layer for prevention of gate-body shortage. ### Claim 22 An integrated circuit comprising: a substrate of a first conductivity type; an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower doping concentration than said substrate; a trench MOSFET comprising a plurality of trenched gates surrounded by a source region of said first conductivity type encompassed in a body region of a second conductivity type; each said trenched gate comprising a conductive material padded by a gate oxide layer filled in a gate trench, wherein said gate oxide layer having a thick bottom oxide on bottom surface of said gate trench with a thickness greater than sidewall oxide along sidewall of said gate trench; a Gate-Drain clamp diode comprising multiple back to back poly-silicon Zener diodes with alternating doped regions of said first conductivity type next to said second conductivity type, connected with a gate metal on one side, and with a drain metal on another side through a plurality of metal stripes cross over a termination area; and a Gate-Source clamp diode comprising multiple back to back poly-silicon Zener diodes with alternating doped regions of said first conductivity type next to said second conductivity type, connected with said gate metal on one side, and with a source metal on another side. ### Claim 23 (depends on 1) The integrated circuit of claim 1 wherein: said Gate-Source clamp diode being connected to said source metal through a first trenched diode contact filled with said contact metal plug while being connected to said gate metal through a second trenched diode contact filled with said contact metal plug, said Gate-Drain clamp diode being connected to said gate metal through a third trenched diode contact filled with said contact metal plug while being connected to said drain metal through a forth trenched diode contact filled with said contact metal plug. ### Claim 24 (depends on 23) The integrated circuits of claim 23 further comprising an etch-buffer trenched gate in said epitaxial layer and underneath each of said first, second, third and forth trenched diode contacts, said etch-buffer trenched gate having same structure of said trenched gates in said trench MOSFET and serving as buffer layer for prevention of gate-body shortage. ### Claim 25 An integrated circuit comprising: a substrate of a first conductivity type; an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower doping concentration than said substrate; a trench MOSFET comprising a plurality of trenched gates surrounded by a source region of said first conductivity type encompassed in a body region of a second conductivity type; each said trenched gate comprising a conductive material padded by a gate oxide layer filled in a gate trench, wherein said gate oxide layer having a thick bottom oxide on bottom surface of said gate trench with a thickness greater than sidewall oxide along sidewall of said gate trench; a Gate-Source clamp diode comprising multiple back to back poly-silicon Zener diode with alternating doped regions of said first conductivity type next to said second conductivity type, connected with a gate metal on one side, and with a source on another side. ### Claim 26 (depends on 25) The integrated circuit of claim 25 wherein: said Gate-Source clamp diode being connected to said source metal through a first trenched diode contact filled with said contact metal plug while being connected to said gate metal through a second trenched diode contact filled with said contact metal plug. ### Claim 27 (depends on 26) The integrated circuit of claim 26 further comprising an etch-buffer trenched gate in said epitaxial layer and underneath each of said first and second trenched diode contacts, said etch-buffer trenched gate having same structure of said trenched gates in said trench MOSFET and serving as buffer layer for prevention of gate-body shortage. ### Claim 28 An integrated circuit comprising: a substrate of a first conductivity type; an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower doping concentration than said substrate; a trench MOSFET comprising a plurality of trenched gates surrounded by a source region of said first conductivity type encompassed in a body region of a second conductivity type; each said trenched gate comprising a conductive material padded by a gate oxide layer filled in a gate trench, wherein said gate oxide layer having a thick bottom oxide on bottom surface of said gate trench with a thickness greater than sidewall oxide along sidewall of said gate trench; a Gate-Drain clamp diode comprising multiple back to back poly-silicon Zener diodes with alternating doped regions of said first conductivity type next to said second conductivity type, connected with a gate metal on one side, and with a drain metal on another side through a plurality of metal stripes cross over a termination area. ### Claim 29 (depends on 15) The integrated circuit of claim 15 wherein: said Gate-Drain clamp diode being connected to said gate metal through a first trenched diode contact filled with said contact metal plug while being connected to said drain metal through a second trenched diode contact filled with said contact metal plug. ### Claim 30 (depends on 29) The integrated circuits of claim 29 further comprising an etch-buffer trenched gate in said epitaxial layer and underneath each of said first and second trenched diode contacts, said etch-buffer trenched gate having same structure of said trenched gates in said trench MOSFET and serving as buffer layer for prevention of gate-body shortage.