# US 8,569,760 B2 · Thin film transistor having oxide semiconductor layer as ohmic contact layer and method of fabricating the same

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- Number: US 8,569,760 B2
- Document ID: US8569760B2
- Status: Granted
- Kind: B2
- Application number: 12/926,114
- Filed: 2010-10-27
- Published: 2011-06-02
- Granted: 2013-10-29
- Earliest claimed: 2009-11-30
- Assignees: Samsung Display Co., Ltd.
- Applicants: Chun-Gi You
- Inventors: Chun-Gi You
- Web page: https://patentgrep.com/patent/US8569760B2

## CPC

- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6732: {Bottom-gate only TFTs}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A thin film transistor TFT, including a substrate, a gate electrode on the substrate, a gate insulating layer on the gate electrode, an active layer on the gate insulating layer, the active layer corresponding to the gate electrode and including a channel region, source and drain electrodes contacting the active layer, the source and drain electrodes being separate from each other, and an ohmic contact layer between the active layer and at least one of the source and drain electrodes, the ohmic contact layer including an oxide semiconductor material.

## Claims

### Claim 1

A method of fabricating a thin film transistor, the method comprising:
forming a gate electrode on a substrate;
forming a gate insulating layer on the gate electrode;
forming an active layer on the gate insulating layer, the active layer corresponding to the gate electrode and including a channel region;
forming source and drain electrodes on the active layer, the source and drain electrodes being separate from each other; and
forming an ohmic contact layer between the active layer and at least one of the source and drain electrodes by depositing an oxide semiconductor material on the active layer and by selectively controlling an amount of oxygen flow for the oxide semiconductor material wherein the oxide semiconductor material includes at least one of Ga, Sb, Ge, Hf, and As.

### Claim 2 (depends on 1)

The method as claimed in claim 1, wherein forming the ohmic contact layer includes depositing the oxide semiconductor material on the active layer using a sputtering method.

### Claim 3 (depends on 1)

The method as claimed in claim 1, wherein the oxide semiconductor material includes at least one of Ga2O3 and HfO2.

### Claim 4 (depends on 3)

The method as claimed in claim 3, wherein the active layer includes polysilicon.

### Claim 5 (depends on 4)

The method as claimed in claim 4, wherein forming the active layer includes using a low temperature poly-Si (LTPS) process.

### Claim 6 (depends on 1)

The method as claimed in claim 1, further comprising forming a channel stopper layer corresponding to the channel region, such that the channel region is between the channel stopper layer and the gate electrode.

### Claim 7 (depends on 6)

The method as claimed in claim 6, wherein the channel stopper layer includes a nitride.

### Claim 8 (depends on 1)

The method as claimed in claim 1, wherein selectively controlling the amount of oxygen follow includes using different amounts of oxygen flow relative to a same amount of semiconductor material in accordance with a desired resistance value of the ohmic contact layer.

### Claim 9 (depends on 8)

The method as claimed in claim 8, wherein using different amounts of oxygen flow includes forming the oxide semiconductor material as a conductor or as a nonconductor.

### Claim 10 (depends on 1)

The method as claimed in claim 1, wherein depositing the oxide semiconductor material includes performing material deposition and oxygen flow control simultaneously, such that only the amount of oxygen flow is changed to modify a ratio between the oxygen and a semiconductor material in the oxide semiconductor material.

### Claim 11 (depends on 1)

The method as claimed in claim 1, wherein forming the active layer, source and drain electrodes, and ohmic contact layer is performed simultaneously via a single process using a half-tone mask.

### Claim 12 (depends on 1)

The method as claimed in claim 1, wherein forming the source and drain electrodes and the ohmic contact layer includes simultaneously patterning the source and drain electrodes and the ohmic contact layer with a same mask, such that an outermost sidewall of each of the source and drain electrode is coplanar with a respective outermost sidewall of the ohmic contact layer.

### Claim 13 (depends on 1)

The method as claimed in claim 1, wherein forming the ohmic contact layer includes patterning the ohmic contact layer, such that the ohmic contact layer completely separates each of the source and drain electrodes from the active layer.