# US 8,569,754 B2 · Semiconductor device and manufacturing method thereof

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- Number: US 8,569,754 B2
- Document ID: US8569754B2
- Status: Granted
- Kind: B2
- Application number: 13/285,385
- Filed: 2011-10-31
- Published: 2012-05-10
- Granted: 2013-10-29
- Earliest claimed: 2010-11-05
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Shunpei Yamazaki; Yusuke Nonaka; Takatsugu Omata; Tatsuya Honda; Akiharu Miyanaga; Hiroki Ohara
- Inventors: Shunpei Yamazaki; Yusuke Nonaka; Takatsugu Omata; Tatsuya Honda; Akiharu Miyanaga; Hiroki Ohara
- Web page: https://patentgrep.com/patent/US8569754B2

## CPC

- H10D 30/6756: {Amorphous oxide semiconductors}
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6715: {characterised by the doping profiles, e.g. having lightly-doped source or drain extensions}
- H10D 30/6729: {characterised by the electrodes}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 62/402: {Amorphous materials}
- H10D 62/80: characterised by the materials
- H10D 62/875: {being semiconductor metal oxide, e.g. InGaZnO (Group II-VI materials H10D62/86; Group I-VI materials H10D62/871; Pb compounds or alloys H10D62/874)}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device having a novel structure or a method for manufacturing the semiconductor device is provided. For example, the reliability of a transistor which is driven at high voltage or large current is improved. For improvement of the reliability of the transistor, a buffer layer is provided between a drain electrode layer (or a source electrode layer) and an oxide semiconductor layer such that the end portion of the buffer layer is beyond the side surface of the drain electrode layer (or the source electrode layer) when seen in a cross section, whereby the buffer layer can relieve the concentration of electric field. The buffer layer is a single layer or a stacked layer including a plurality of layers, and includes, for example, an In—Ga—Zn—O film containing nitrogen, an In—Sn—O film containing nitrogen, an In—Sn—O film containing SiOx, or the like.

## Claims

### Claim 1

A semiconductor device comprising:
an oxide semiconductor layer;
a first buffer layer and a second buffer layer in contact with the oxide semiconductor layer;
a source electrode layer and a drain electrode layer overlapping with the oxide semiconductor layer with the first buffer layer and the second buffer layer provided therebetween, respectively;
a gate insulating layer in contact with the oxide semiconductor layer; and
a gate electrode layer overlapping with the oxide semiconductor layer with the gate insulating layer provided therebetween,
wherein the gate electrode layer has a stacked-layer structure,
wherein one layer of the stacked-layer structure, whose surface is in contact with the gate insulating layer, is a first metal oxide containing nitrogen, and
wherein each of the first buffer layer and the second buffer layer is a second metal oxide containing nitrogen.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the first buffer layer and the second buffer layer extend beyond a side surface of the source electrode layer and a side surface of the drain electrode layer in a channel length direction, respectively.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein light transmittances of the first buffer layer and the second buffer layer are lower than a light transmittance of the oxide semiconductor layer.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein the first metal oxide is the same material as the second metal oxide.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the second metal oxide comprises a material containing at least indium, oxygen, and nitrogen.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein an another layer of the gate electrode layer comprises a material containing aluminum or copper.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1, wherein at least part of the oxide semiconductor layer comprises a crystelline region having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1, wherein the first buffer layer and the second buffer layer comprise polycrystalline.

### Claim 9 (depends on 1)

The semiconductor device according to claim 1, wherein the stacked-layer structure includes three layers.

### Claim 10

A semiconductor device comprising:
an oxide semiconductor layer;
a first buffer layer and a second buffer layer in contact with the oxide semiconductor layer;
a source electrode layer and a drain electrode layer overlapping with the oxide semiconductor layer with the first buffer layer and the second buffer layer provided therebetween, respectively;
a gate insulating layer in contact with the oxide semiconductor layer; and
a gate electrode layer overlapping with the oxide semiconductor layer with the gate insulating layer provided therebetween,
wherein the gate electrode layer has a stacked-layer structure,
wherein one layer of the stacked-layer structure, whose surface is in contact with the gate insulating layer, is a first metal oxide containing nitrogen,
wherein each of the first buffer layer and the second buffer layer is a second metal oxide containing nitrogen, and
wherein the surface is a top surface.

### Claim 11 (depends on 10)

The semiconductor device according to claim 10, wherein the first buffer layer and the second buffer layer extend beyond a side surface of the source electrode layer and a side surface of the drain electrode layer in a channel length direction, respectively.

### Claim 12 (depends on 10)

The semiconductor device according to claim 10, wherein light transmittances of the first buffer layer and the second buffer layer are lower than a light transmittance of the oxide semiconductor layer.

### Claim 13 (depends on 10)

The semiconductor device according to claim 10, wherein the first metal oxide is the same material as the second metal oxide.

### Claim 14 (depends on 10)

The semiconductor device according to claim 10, wherein the second metal oxide comprises a material containing at least indium, oxygen, and nitrogen.

### Claim 15 (depends on 10)

The semiconductor device according to claim 10, wherein an another layer of the gate electrode layer comprises a material containing aluminum or copper.

### Claim 16 (depends on 10)

The semiconductor device according to claim 10, wherein at least part of the oxide semiconductor layer comprises a crystalline region having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

### Claim 17 (depends on 10)

The semiconductor device according to claim 10, wherein the first buffer layer and the second buffer layer comprise polycrystalline.

### Claim 18 (depends on 10)

The semiconductor device according to claim 10, wherein the stacked-layer structure includes three layers.

### Claim 19

A semiconductor device comprising:
an oxide semiconductor layer;
a first buffer layer and a second buffer layer in contact with the oxide semiconductor layer;
a source electrode layer and a drain electrode layer overlapping with the oxide semiconductor layer with the first buffer layer and the second buffer layer provided therebetween, respectively;
a gate insulating layer in contact with the oxide semiconductor layer; and
a gate electrode layer overlapping with the oxide semiconductor layer with the gate insulating layer provided therebetween,
wherein the gate electrode layer has a stacked-layer structure,
wherein one layer of the stacked-layer structure, whose surface is in contact with the gate insulating layer, is a first metal oxide containing nitrogen,
wherein each of the first buffer layer and the second buffer layer is a second metal oxide containing nitrogen,
wherein the surface is a bottom surface.

### Claim 20 (depends on 19)

The semiconductor device according to claim 19, wherein the first buffer layer and the second buffer layer extend beyond a side surface of the source electrode layer and a side surface of the drain electrode layer in a channel length direction, respectively.

### Claim 21 (depends on 19)

The semiconductor device according to claim 19, wherein light transmittances of the first buffer layer and the second buffer layer are lower than a light transmittance of the oxide semiconductor layer.

### Claim 22 (depends on 19)

The semiconductor device according to claim 19, wherein the first metal oxide is the same material as the second metal oxide.

### Claim 23 (depends on 19)

The semiconductor device according to claim 19, wherein the second metal oxide comprises a material containing at least indium, oxygen, and nitrogen.

### Claim 24 (depends on 19)

The semiconductor device according to claim 19, wherein an another layer of the gate electrode layer comprises a material containing aluminum or copper.

### Claim 25 (depends on 19)

The semiconductor device according to claim 19, wherein at least part of the oxide semiconductor layer comprises a crystalline region having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

### Claim 26 (depends on 19)

The semiconductor device according to claim 19, wherein the first buffer layer and the second buffer layer comprise polycrystalline.

### Claim 27 (depends on 19)

The semiconductor device according to claim 19, wherein the stacked-layer structure includes three layers.

### Claim 28 (depends on 1)

The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium, gallium and zinc.

### Claim 29 (depends on 10)

The semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises indium, gallium and zinc.

### Claim 30 (depends on 19)

The semiconductor device according to claim 19, wherein the oxide semiconductor layer comprises indium, gallium and zinc.

### Claim 31

A semiconductor device comprising:
an oxide semiconductor layer;
a gate electrode layer overlapping with the oxide semiconductor layer; and
a gate insulating layer between the oxide semiconductor layer and the gate electrode layer,
wherein the gate electrode layer comprises a first layer and a second layer,
wherein the first layer comprises a metal element, oxygen, and nitrogen,
wherein the second layer comprises copper, and
wherein the first layer, the second layer, and the oxide semiconductor layer overlap with one another.

### Claim 32 (depends on 31)

The semiconductor device according to claim 31, wherein the metal element is indium.

### Claim 33 (depends on 31)

The semiconductor device according to claim 31, wherein at least part of the oxide semiconductor layer comprises a crystalline region having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

### Claim 34 (depends on 31)

The semiconductor device according to claim 31, wherein the oxide semiconductor layer comprises indium, gallium and zinc.

### Claim 35 (depends on 31)

The semiconductor device according to claim 31, wherein the gate electrode layer is provided under the oxide semiconductor layer.

### Claim 36

A semiconductor device comprising:
an oxide semiconductor layer;
a source electrode layer electrically connected to the oxide semiconductor layer;
a drain electrode layer electrically connected to the oxide semiconductor layer;
a first buffer layer between the oxide semiconductor layer and the source electrode layer;
a second buffer layer between the oxide semiconductor layer and the drain electrode layer;
a gate electrode layer overlapping with the oxide semiconductor layer; and
a gate insulating layer between the oxide semiconductor layer and the gate electrode layer,
wherein each of the first buffer layer and the second buffer layer comprises a metal element, oxygen, and nitrogen, and
wherein the gate electrode layer comprises a metal element, oxygen, and nitrogen.

### Claim 37 (depends on 36)

The semiconductor device according to claim 36, wherein the metal element comprised in each of the first buffer layer and the second buffer layer is indium.

### Claim 38 (depends on 36)

The semiconductor device according to claim 36, wherein the gate electrode layer comprises:
a first layer comprising a metal element, oxygen, and nitrogen; and
a second layer comprising one of aluminum and copper,
wherein the first layer and the second layer overlap with each other.

### Claim 39 (depends on 36)

The semiconductor device according to claim 36, wherein at least part of the oxide semiconductor layer comprises a crystalline region having c-axis alignment in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

### Claim 40 (depends on 36)

The semiconductor device according to claim 36, wherein the gate electrode layer is provided under the oxide semiconductor layer.

### Claim 41 (depends on 36)

The semiconductor device according to claim 36, wherein the oxide semiconductor layer comprises indium, gallium and zinc.