# US 8,569,731 B2 · Nonvolatile memory device and method for manufacturing same

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- Number: US 8,569,731 B2
- Document ID: US8569731B2
- Status: Granted
- Kind: B2
- Application number: 12/726,743
- Filed: 2010-03-18
- Published: 2010-09-30
- Granted: 2013-10-29
- Earliest claimed: 2009-03-25
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Takuya Konno; Hiroyuki Fukumizu; Kazuhito Nishitani
- Inventors: Takuya Konno; Hiroyuki Fukumizu; Kazuhito Nishitani
- Web page: https://patentgrep.com/patent/US8569731B2

## CPC

- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10B 63/20: {comprising selection components having two electrodes, e.g. diodes}
- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10N 70/063: {by etching of pre-deposited switching material layers, e.g. lithography}
- H10N 70/20: Multistable switching devices, e.g. memristors
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/801: {Constructional details of multistable switching devices}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10N 70/8833: {Binary metal oxides, e.g. TaOx}
- H10N 70/8836: {Complex metal oxides, e.g. perovskites, spinels}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A nonvolatile memory device includes: at least one first interconnection extending in a first direction; at least one second interconnection disposed above the first interconnection and extending in a second direction nonparallel to the first direction; a memory cell disposed between the first interconnection and the second interconnection at an intersection of the first interconnection and the second interconnection and including a memory element; and an element isolation layer disposed between the memory cells. At least one dielectric film with a higher density than the element isolation layer is disposed on a sidewall surface of the memory cell.

## Claims

### Claim 1

A nonvolatile memory device comprising:
at least one first interconnection extending in a first direction;
at least one second interconnection disposed above the first interconnection and extending in a second direction nonparallel to the first direction;
a memory cell disposed between the first interconnection and the second interconnection at an intersection of the first interconnection and the second interconnection and including a memory element;
an element isolation layer disposed between the memory cells; and
at least one dielectric film with a higher density than the element isolation layer being disposed on a sidewall surface of the memory cell,
the element isolation layer including a low-k material, a dielectric constant of the element isolation layer being lower than a dielectric constant of the dielectric film, a sidewall surface and a bottom surface of the element isolation layer being covered with the continuous dielectric film.

### Claim 2 (depends on 1)

The device according to claim 1, wherein a concentration of impurities contained in the element isolation layer is higher than a concentration of impurities contained in the dielectric film.

### Claim 3 (depends on 1)

The device according to claim 1, wherein the dielectric film includes a first dielectric film and a second dielectric film, the first dielectric film with a higher density than the element isolation layer is disposed on the sidewall surface of the memory cell, and the second dielectric film with a lower dielectric constant than the first dielectric film and with a higher density than the element isolation layer is disposed on the first dielectric film.

### Claim 4 (depends on 1)

The device according to claim 1, wherein a rectifying element is provided in the memory cell.