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US 8,569,139 B2Granted
Method of manufacturing strained source/drain structures
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Feng Nieh, Ming-Huan Tsai, Wei-Han Fan, Yimin Huang, Chun-Fai Cheng, Han-Ting Tsai, Chii-Ming Wu
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Abstract
An integrated circuit device and method for manufacturing the integrated circuit device is disclosed. The disclosed method provides improved control over a surface proximity and tip depth of an integrated circuit device. In an embodiment, the method achieves improved control by forming a doped region and a lightly doped source and drain (LDD) region in a source and drain region of the device. The doped region is implanted with a dopant type opposite to the LDD region.
Claims20
A method comprising:
- providing a semiconductor substrate;
- forming a gate structure over the substrate;
- performing a first implantation process with a first dopant and a first dosage on the substrate, thereby forming a lightly doped source and a lightly doped drain within lightly doped source and drain (LDD) regions, respectively, in the substrate, the LDD regions being interposed by the gate structure;
- performing a second implantation process with a second dopant and a second dosage on the substrate, thereby forming doped features in the substrate and over the lightly doped source and drain, the second dopant being opposite to the first dopant, the doped features being substantially aligned with a sidewall of the LDD regions-adjacent to the gate structure and the doped features extending from a top surface of the LDD regions a depth into the LDD regions such that the doped features are disposed over the lightly doped source and the lightly doped drain;
- forming spacers for the gate structure;
- removing portions of the substrate at either side of the gate structure, thereby forming a recess in the substrate that defines a source and drain region in the substrate;
- and
- epitaxially (epi) growing a semiconductor material to fill the recess, thereby forming source and drain features.
5 more elements
A method comprising:
- providing a semiconductor substrate having a first region and a second region;
- forming first and second gate structures over the substrate in the first and second regions, respectively;
- forming first and second lightly doped source and drain (LDD) regions adjacent to the first and second gate structures, respectively, wherein forming first and second lightly doped source and drain (LDD) regions includes forming at least one of a lightly doped source and a lightly doped drain in the second LDD region including;
- forming a protective layer over the substrate and the second gate structure;
- after forming the at least one of the lightly doped source and the lightly doped drain in the second region, forming a doped feature in the second LDD region through the protective layer, wherein the doped feature is substantially aligned with a sidewall of the second LDD region and the doped feature is disposed within the second LDD region, wherein the at least one of the lightly doped source and the lightly doped drain of the second LDD region extends vertically further within the substrate away from the second gate structure than the doped feature in the second LDD region;
- forming spacers for the first and second gate structures;
- forming a first recess in the substrate at either side of the first gate structure;
- epitaxially (epi) growing a first semiconductor material to fill the first recess;
- forming a second recess in the substrate at either side of the second gate structure;
- and
- epitaxially (epi) growing a second semiconductor material to fill the second recess, the second semiconductor material being different than the first semiconductor material.
8 more elements
A method comprising:
- providing a semiconductor substrate having a first region and a second region;
- forming first and second gate structures over the substrate in the first and second regions, respectively;
- forming first and second lightly doped source and drain (LDD) regions in the first and second regions, respectively, the first LDD region including at least one of a lightly doped source and a lightly doped drain;
- forming a first doped feature in the substrate in the first region at either side of the first gate structure and over the at least one of the lightly doped source and the lightly doped drain of the first LDD region, wherein the first doped feature is substantially aligned with a sidewall of the first LDD region adjacent to the first gate structure and the first doped feature extends from a top surface of the first LDD region a depth into the first LDD region such that the first doped feature is disposed over the at least one of the lightly doped source and the lightly doped drain within the first LDD region;
- forming a second doped feature in the substrate in the second region at either side of the second gate structure, wherein the second doped feature is substantially aligned with a sidewall of the second LDD region adjacent to the second gate structure and the second doped feature extends from a top surface of the second LDD region a depth into the second LDD region such that the second doped feature is disposed within the second LDD region;
- forming a first recess in the substrate at either side of the first gate structure;
- epitaxially (epi) growing a first semiconductor material to fill the first recess;
- forming main spacers for the first and second gate structures;
- forming a second recess in the substrate at either side of the second gate structure;
- and
- epitaxially (epi) growing a second semiconductor material to fill the second recess, the second semiconductor material being different than the first semiconductor material.
8 more elements
Dependencies are inferred from the claim text.