US 8,561,037 B2Granted

Compiler for generating an executable comprising instructions for a plurality of different instruction sets

AssigneeConvey Computer

InventorsSteven J. Wallach, Tony Brewer

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Abstract

A software compiler is provided that is operable for generating an executable that comprises instructions for a plurality of different instruction sets as may be employed by different processors in a multi-processor system. The compiler may generate an executable that includes a first portion of instructions to be processed by a first instruction set (such as a first instruction set of a first processor in a multi-processor system) and a second portion of instructions to be processed by a second instruction set (such as a second instruction set of a second processor in a multi-processor system). Such executable may be generated for execution on a multi-processor system that comprises at least one host processor, which may comprise a fixed instruction set, such as the well-known x86 instruction set, and at least one co-processor, which comprises dynamically reconfigurable logic that enables the co-processor's instruction set to be dynamically reconfigured.

Claims37

Dependent claims

A method for compiling an executable file for execution on a target system, wherein the target system comprises a host processor having a first, fixed processor instruction set and a heterogeneous co-processor having reconfigurable logic for dynamically reconfiguring the co-processor's instruction set to be any of a plurality of predefined co-processor instruction sets, wherein each of the plurality of predefined co-processor instruction sets provides extended instructions that are not natively supported by the first instruction set of the host processor, thereby extending the first processor instruction set of the host processor, and wherein the plurality of predefined co-processor instruction sets are mutually exclusive, the method comprising:

receiving, by a compiler, source code for a software application;
analyzing, by the compiler, types of operations encountered in the received source code
determining, by the compiler using said analyzing, instructions of a predefined co-processor instruction set of the plurality of predefined co-processor instruction sets that optimally enhance performance of at least a portion of the types of operations encountered in the received source code;
selecting, by the compiler, said predefined co-processor instruction set of said plurality of predefined co-processor instruction sets as a selected predefined co-processor instruction set having extended instructions to be generated in said executable file;
and
processing, by the compiler, the source code to generate said executable file that comprises
native instructions of the host processor's instruction set, and
extended instructions of said selected predefined co-processor instruction set determined to optimally enhance performance of the at least a portion of the types of operations encountered in the received source code.

5 more elements

A method comprising:

receiving, by a compiler, source code for a software application;
and
processing, by the compiler, the source code to generate an executable file that comprises instructions for execution on a target system, said target system comprising a host processor having a first, fixed processor instruction set and a heterogeneous co-processor having reconfigurable logic for dynamically reconfiguring the co-processor's instruction set to be any of a plurality of predefined co-processor instruction sets, wherein each of the plurality of predefined co-processor instruction sets provides extended instructions that are not natively supported by the first instruction set of the host processor, thereby extending the first processor instruction set of the host processor, and wherein the plurality of predefined co-processor instruction sets are mutually exclusive, wherein the processing, by the compiler, includes;
analyzing types of operations encountered in the received source code
determining, using said analyzing, instructions of a predefined co-processor instruction set of the plurality of predefined co-processor instruction sets that optimally enhance performance of at least a portion of the types of operations encountered in the received source code;
selecting said predefined co-processor instruction set of said plurality of predefined co-processor instruction sets as a predefined co-processor instruction set having extended instructions to be generated in said executable file;
and
generating said executable file, wherein instructions generated by the compiler in the executable file comprise instructions native to said first processor instruction set of the host processor and extended instructions of said selected predefined co-processor instruction set determined to optimally enhance performance of the at least a portion of the types of operations encountered in the received source code.

5 more elements

A compiler comprising computer-executable software code stored to a non-transitory, tangible computer-readable storage medium, the compiler comprising:

front-end for receiving source code for a software application;
machine-dependent optimizer for determining instructions of a predefined co-processor instruction set of said plurality of predefined co-processor instruction sets that optimally enhance performance of operations in the received source code and thus for which extended instructions are to be generated from said received source code;
a plurality of code generators for processing the source code to generate instructions in an executable file for execution on a target system, said target system comprising a host processor having a first, fixed processor instruction set and a heterogeneous co-processor having reconfigurable logic for dynamically reconfiguring the co-processor's instruction set to be any predefined co-processor instruction set of said plurality of predefined co-processor instruction sets, wherein each of the plurality of predefined co-processor instruction sets provides extended instructions that are not natively supported by the first instruction set of the host processor, thereby extending the first processor instruction set of the host processor, and wherein the plurality of predefined co-processor instruction sets are mutually exclusive;
wherein the instructions in the executable file comprise instructions that are native to the processor instruction set of the host processor and the extended instructions of predefined co-processor instruction set determined to be generated from said received source code by said machine-dependent optimizer;
and
wherein the plurality of code generators comprise
a first code generator for generating said instructions that are native to the processor instruction set of the host processor, and
a plurality of second code generators, wherein the plurality of second code generators include a second code generator for generating said extended instructions of said predefined co-processor instruction set determined to optimally enhance performance of operations in the received source code.

5 more elements

Dependencies are inferred from the claim text.