Method and apparatus for erasure decoding an ECC coded bitstream
AssigneeThomson Licensing
InventorsOliver Theis, Xiaoming Chen, Friedrich Timmermann
Life of this patent
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Abstract
The error correction capability of block codes can be doubled if error locations are known. Prior art approaches for error location detection always involve adding dedicated redundant data which then are evaluated to yield error location information. The present invention proposes and describes how error location information in the form of clues is derived from given DC control bits that are anyway present in a data stream.
Claims4
A method for erasure decoding an ECC coded bitstream that comprises Data Channel (DC) control bit patterns formed from DC control bits of the ECC coded bitstream together with preceding and subsequent data bits from the ECC coded bitstream, comprising:
- using the DC control bit patterns as self-checkable erasure clues,
- wherein no other information is needed other than the erasure clue itself to derive if the erasure clue has been corrupted or not,
- wherein the erasure clues constitute an erasure information where negative erasure clues indicate no error, and positive erasure clues indicate the occurrence of an error.
Dependencies are inferred from the claim text.