Techniques for varying a periodic signal based on changes in a data rate
AssigneeAltera Corporation
InventorTim Tri Hoang
Life of this patent
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Abstract
A circuit includes a phase detection circuit, a phase adjustment circuit, and a sampler circuit. The phase detection circuit compares a phase of a first periodic signal to a phase of a second periodic signal to generate a control signal. The phase adjustment circuit causes the phase of the second periodic signal and a phase of a third periodic signal to vary based on a variation in the control signal. The sampler circuit samples a data signal to generate a sampled data signal in response to the third periodic signal. The circuit varies a frequency of the third periodic signal to correspond to changes in a data rate of the data signal between at least three different data rates that are based on at least three data transmission protocols.
Claims30
A circuit comprising:
- a first phase detection circuit that compares a phase of a first periodic signal to a phase of a second periodic signal to generate a first control signal;
- a phase adjustment circuit that causes the phase of the second periodic signal and a phase of a third periodic signal to vary based on a variation in the first control signal;
- and
- a sampler circuit that samples a data signal to generate a sampled data signal in response to the third periodic signal, wherein the circuit varies a frequency of the third periodic signal to correspond to changes in a data rate of the data signal between at least three different data rates that are based on at least three data transmission protocols;
- a first frequency divider circuit that generates the second periodic signal based on a fourth periodic signal;
- a second frequency divider circuit that generates the third periodic signal based on a fifth periodic signal, wherein the phase adjustment circuit causes phases of the fourth and the fifth periodic signals to vary based on a change in the first control signal;
- and
- a control circuit that varies frequency division values of the first and the second frequency divider circuits based on changes in the data rate of the data signal between the three different data rates.
A circuit comprising:
- a first phase detection circuit that compares a phase of a first periodic signal to a phase of a second periodic signal to generate a first control signal;
- a phase adjustment circuit that causes the phase of the second periodic signal and phase of a third periodic signal to vary based on a variation in the first control signal;
- a sampler circuit that samples a data signal to generate a sampled data signal in response to the third periodic signal;
- a lock detector circuit that receives the first control signal and that generates a lock signal indicating if phases of the first and the second periodic signals are aligned;
- a control circuit that causes a frequency of the third periodic signal to vary based on changes in a data rate of the data signal, wherein the control circuit generates a second control signal based on the lock signal after the data rate of the data signal changes during a transition between two data transmission protocols;
- and
- a gating circuit that generates a fourth periodic signal from the third periodic signal, wherein the gating circuit blocks the fourth periodic signal based on the second control signal.
A circuit comprising:
- a first phase detection circuit that compares a phase of a first periodic signal to a phase of a second periodic signal to generate a first control signal;
- a phase adjustment circuit that causes the phase of the second periodic signal and a phase of a third periodic signal to vary based on a change in the first control signal;
- a sampler circuit that samples a data signal to generate a sampled data signal in response to the third periodic signal, wherein the circuit varies a frequency of the third periodic signal to correspond to changes in a data rate of the data signal;
- and
- a gating circuit that generates a fourth periodic signal from the third periodic signal, wherein the gating circuit blocks the fourth periodic signal based on a second control signal being asserted in response to a change in the data rate of the data signal.
A circuit comprising:
- a first phase detection circuit that compares a phase of a first periodic signal to a phase of a second periodic signal to generate a first control signal;
- a phase adjustment circuit that causes the phase of the second periodic signal and a phase of a third periodic signal to vary based on a change in the first control signal;
- a sampler circuit that samples a data signal to generate a sampled data signal in response to the third periodic signal;
- and
- a logic circuit that asserts a second control signal in response to a third control signal having a constant state for more than one period of a fourth periodic signal and in response to a fourth control signal having a constant state for more than one period of the fourth periodic signal, wherein the circuit varies a frequency of the third periodic signal to correspond to changes in a data rate of the data signal in response to the second control signal being asserted.
A method comprising:
- comparing a phase of a first periodic signal to a phase of a second periodic signal to generate a first control signal;
- adjusting the phase of the second periodic signal and a phase of a third periodic signal based on a change in the first control signal;
- sampling a data signal to generate a sampled data signal in response to the third periodic signal;
- varying a frequency of the third periodic signal to correspond to changes in a data rate of the data signal between at least three different data rates, wherein each of the three different data rates of the data signal is based on a different data transmission protocol;
- dividing a frequency of a fourth periodic signal by a first frequency division value to generate a frequency of the second periodic signal;
- dividing a frequency of a fifth periodic signal by a second frequency division value to generate a frequency of the third periodic signal;
- and
- varying the first and the second frequency division values in response to the data signal varying between the three different data rates.
A method comprising:
- comparing a phase of a first periodic signal to a phase of a second periodic signal to generate a first control signal;
- adjusting the phase of the second periodic signal and a phase of a third periodic signal based on a change in the first control signal;
- sampling a data signal to generate a sampled data signal in response to the third periodic signal;
- varying a frequency of the third periodic signal to correspond to changes in a data rate of the data signal;
- generating a lock signal indicating if the phases of the first and the second periodic signals are aligned based on the first control signal;
- generating a second control signal based on the lock signal after the data rate of the data signal changes during a transition between two different data rates of the data signal;
- generating a fourth periodic signal from the third periodic signal based on the second control signal;
- and
- preventing the fourth periodic signal from being generated using the third periodic signal based on the second control signal.
A method comprising:
- comparing a phase of a first periodic signal to a phase of a second periodic signal to generate a first control signal;
- adjusting the phase of the second periodic signal and a phase of a third periodic signal based on a change in the first control signal;
- sampling a data signal to generate a sampled data signal in response to the third periodic signal;
- asserting a second control signal in response to a third control signal having a constant state for more than one period of a fourth periodic signal and in response to a fourth control signal having a constant state for more than one period of the fourth periodic signal;
- and
- varying a frequency of the third periodic signal to correspond to changes in a data rate of the data signal when the second control signal is asserted.
Dependencies are inferred from the claim text.