Apparatus and method for generating scrambling codes in a radio communication system

An apparatus to generate a scrambling code in a radio communication system, the apparatus comprising:

• a first linear feedback shift register (LFSR) comprising m blocks and constructed by a primitive polynomial of degree m over Galois Field of two (GF(2));
• a second LFSR comprising m blocks and constructed by a reciprocal primitive polynomial of the primitive polynomial of degree m;
• a first initial value mapper configured to input a fixed initial value to the first LFSR at every initialization period;
• a second initial value mapper configured to selectively input one of different initial values of m bits to the second LFSR at every initialization period;
• a controller configured to control the second initial value mapper based on a total sum of information bits, the total sum being between 1 and m bits, of system-specific information and to control one of the different initial values of m bits to be input to the second LFSR;
• and
• a modulo 2 operator configured to add an output sequence from the first LFSR and an output sequence from the second LFSR bit by bit by a modulo 2 operation,
• wherein m is an integer number greater than 0.