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US 8,559,260 B2Granted
Regulator circuit and semiconductor memory device including the same
AssigneeSK hynix Inc.
InventorTae Heui Kwon
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes a charge pump circuit for generating a pass pump voltage in response to a clock signal and a pump enable signal and a regulator circuit for maintaining the pass pump voltage in the same level as a program pass voltage during a program operation and discharging the program pass voltage during a verification operation so that the program pass voltage has the same level as a verification pass voltage.
Claims16
A semiconductor memory device, comprising:
- a charge pump circuit configured to generate a pass pump voltage in response to a clock signal and a pump enable signal;
- and
- a regulator circuit configured to regulate the pass pump voltage to output a program pass voltage during a program operation and discharge the program pass voltage to output a verification pass voltage during a verification operation;
- wherein the regulator circuit detects the program pass voltage in a period during which the program operation switches to the verification operation and controls a period in which the program pass voltage is discharged, and
- wherein the regulator circuit comprises:
- a regulator configured to receive the pass pump voltage and a bandgap voltage and generate the program pass voltage;
- a discharge circuit configured to discharge the program pass voltage to a predetermined voltage level by comparing the bandgap voltage and a feedback voltage, generated by the regulator;
- and
- a control circuit configured to generate a control signal for enabling the discharge circuit in response to a regulator discharge control signal, generated by the discharge circuit and a regulator discharge signal activated for a predetermined time during the period in which the program operation switches to the verification operation.
6 more elements
A regulator circuit, comprising:
- a regulator configured to receive a pass pump voltage and a bandgap voltage and generating a pass voltage;
- a discharge circuit configured to discharge the pass voltage to a predetermined voltage level by comparing the bandgap voltage and a feedback voltage obtained by using the pass voltage;
- and
- a control circuit configured to generate a control signal for enabling the discharge circuit in response to a regulator discharge control signal generated by the discharge circuit and a regulator discharge signal activated for a predetermined time during a period in which a program operation switches to a verification operation.
1 more element
A semiconductor memory device, comprising:
- a charge pump circuit configured to generate a pass pump voltage in response to a clock signal and a pump enable signal;
- a regulator circuit configured to receive the pass pump voltage and generating a program pass voltage;
- and
- a switching circuit configured to supply the program pass voltage to a word line,
- wherein the regulator circuit detects the program pass voltage in a period during which a program operation switches to a verification operation and controls a period in which the program pass voltage is discharged to provide a verification pass voltage used in the verification operation, and
- wherein the regulator circuit comprises:
- a regulator configured to receive the pass pump voltage and a bandgap voltage and generate the program pass voltage;
- a discharge circuit configured to discharge the program pass voltage to a predetermined voltage level by comparing the bandgap voltage and a feedback voltage, generated by the regulator;
- and
- a control circuit configured to generate a control signal for enabling the discharge circuit in response to a regulator discharge control signal, generated by the discharge circuit and a regulator discharge signal activated for a predetermined time during the period in which the program operation switches to the verification operation.
7 more elements
Dependencies are inferred from the claim text.