Non-volatile semiconductor memory with page erase
AssigneeMosaid Technologies Incorporated
InventorJin-Ki Kim
Life of this patent
Estimating the term…
Abstract
In a nonvolatile memory, less than a full block maybe erased as one or more pages. A select voltage is applied through pass transistors to each of plural selected wordlines and an unselect voltage is applied through pass transistor to each of plural unselected wordlines of a selected block. A substrate voltage is applied to the substrate of the selected block. A common select voltage may be applied to each selected wordline and the common unselect voltage may be applied to each unselected wordline. Select and unselect voltages may be applied to any of the wordlines of a select block. A page erase verify operation may be applied to a block having plural erased pages and plural nonerased pages.
Claims14
A method for verifying erase of pages of non-volatile memory array having n blocks, each block having m pages of memory cells, each of n and m being a positive integer greater than one, each block having a plurality of strings of memory cells on a substrate and m wordlines across the plurality of strings, each wordline being operably connected to a respective one of the m pages of memory cells, the method comprising:
- selecting at least one of the n blocks;
- selecting any one or ones of the m pages in the selected block;
- applying a select verify voltage to the wordline or wordlines corresponding to the selected any one or ones of the m pages for causing the memory cell of the selected any one or ones of the m pages to conduct if erased;
- applying an unselect verify voltage to the wordline or wordlines corresponding to unselected one or ones of the m pages for causing the memory cell of the unselected one or ones of the m pages to conduct regardless of a respective state of the memory cell of the unselected one or ones of the m pages;
- and
- sensing a state of each of the plurality of strings for verifying erase of the memory cell of the wordline or wordlines corresponding to the selected any one or ones of the m pages.
A non-volatile memory comprising a memory array having a plurality of blocks, each block comprising:
- m pages of memory cells, m being a positive integer greater than one,
- a plurality of strings of memory cells on a substrate, and
- m wordlines across the plurality of strings, each of the m wordlines being operably connected to a respective one of the m pages,
- at least one of the plurality of blocks being selectable,
- the memory further comprising:
- a voltage applier configured to apply:
- a select verify voltage to the wordline of an erased page in the selected block, and
- an unselect verify voltage to the wordline of a non-erased page in the selected block;
- and
- sensors for sensing states of the plurality of strings.
Dependencies are inferred from the claim text.