Semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorHwang Huh
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes even page buffers coupled to even memory cells through respective even bit lines, odd page buffers coupled to odd memory cells through respective odd bit lines, first BL selectors, each configured to couple each of the even bit lines to the respective even page buffers and to couple each of the even page buffers to respective odd bit lines so that the even and odd page buffers precharge the odd bit lines in a precharge operation for the odd bit lines, and second BL selectors, each configured to couple each of the odd bit lines to the respective odd page buffers and to couple each of the odd page buffers to respective even bit lines so that the even and odd page buffers precharge the even bit lines in a precharge operation for the even bit lines.
Claims11
A semiconductor memory device, comprising:
- a memory cell array configured to comprise even cell strings coupled to respective even bit lines and odd cell strings coupled to respective odd bit lines;
- even page buffers coupled to even memory cells of the memory cell array through the respective even bit lines;
- odd page buffers coupled to odd memory cells of the memory cell array through the respective odd bit lines;
- first BL selectors, each configured to couple each of the even bit lines to the respective even page buffers in order to store data in the even memory cells or read data stored in the even memory cells, and to couple each of the even page buffers to respective odd bit lines so that the even and odd page buffers precharge the odd bit lines in a precharge operation for the odd bit lines;
- and
- second BL selectors, each configured to couple each of the odd bit lines to the respective odd page buffers in order to store data in the odd memory cells or read data stored in the odd memory cells, and to couple each of the odd page buffers to respective even bit lines so that the even and odd page buffers precharge the even bit lines in a precharge operation for the even bit lines.
A semiconductor memory device, comprising:
- a first cell string, having first memory cells, coupled to a first bit line;
- a second cell string, having second memory cells, coupled to a second bit line;
- a first page buffer comprising a register and a sense node precharge unit;
- and
- a first BL selector configured to couple the first bit line to the first page buffer during a precharge operation of the first bit line, and to discharge the first bit line during a precharge operation of the second bit line,
- wherein the first BL selector comprising:
- a first BL selection unit configured to couple the first bit line to a first node and the second bit line to a second node:
- a first BL precharge unit configured to couple the first node to the first page buffer;
- a second BL precharge unit configured to couple the second node to the first page buffer:
- a first BL discharge unit configured to couple the first node to a ground voltage terminal;
- and
- a second BL discharge unit configured to couple the second node to a ground voltage terminal.
Dependencies are inferred from the claim text.