Flash memory device and wordline voltage generating method thereof

A word line voltage generating method of a flash memory comprising:

• generating a plurality of negative read voltages corresponding to a plurality of negative data states using a negative voltage generator;
• and
• generating at least one or more positive read voltages corresponding to at least one or more positive data states using a low voltage generator,
• wherein said generating a plurality of negative read voltages comprises
• generating a first negative read voltage,
• discharging an output of the negative voltage generator to become higher than the first negative read voltage, and
• performing a negative charge pumping operation until an output of the negative voltage generator reaches a second negative read voltage level.

A word line voltage generating method of a flash memory comprising:

• generating a first negative voltage via a negative charge pumping of a negative voltage pump;
• discharging an output of the negative voltage pump;
• comparing the discharge output of the negative voltage pump with a second negative voltage that is a target negative voltage;
• and
• if the discharge output of the negative voltage pump is higher than the second negative voltage, activating the negative charge pumping to generate the second negative voltage,
• wherein the negative charge pumping of the negative voltage pump is activated until the discharge output of the negative voltage pump is identical to or lower than the second negative voltage.

A flash memory device comprising:

• a memory cell array including a plurality of flash memory cells disposed at intersections of a plurality of word lines and a plurality of bit lines;
• a voltage generating unit configured to generate a plurality of word line voltages to be applied to the word lines;
• and
• a control logic configured to control a voltage generating operation of the voltage generating unit,
• wherein the voltage generating unit includes a negative voltage generator which is configured to generate a first negative voltage, to discharge the first negative voltage, and to perform a negative charge pumping until a second negative voltage higher than the first negative voltage is generated.

A flash memory device comprising:

• a memory cell array including a plurality of flash memory cells disposed at intersections of a plurality of word lines and a plurality of bit lines;
• a positive voltage generator configured to generate a positive high voltage to be applied to a selected word line and at least one or more positive low voltages corresponding to at least one or more data states;
• a negative voltage generator configured to generate a plurality of negative voltages corresponding to a plurality of negative data states and to be applied to the selected word line;
• and
• a control logic configured to control the positive voltage generator and the negative voltage generator,
• wherein when a second negative voltage is generated after generation of a first negative voltage lower than the second negative voltage, the negative voltage generator discharges an output of the negative voltage generator so as to become higher than the second negative voltage, and performs a negative charge pumping until an output of the negative voltage generator reaches the second negative voltage.

A data storage device comprising:

• a plurality of flash memories connected with a plurality of channels;
• and
• a controller configured to control read, write, and erase operations of each of the plurality of flash memories via corresponding channels,
• wherein each of the plurality of flash memories comprises
• a memory cell array including a plurality of flash memory cells disposed at intersections of a plurality of word lines and a plurality of bit lines,
• a voltage generating unit configured to generate a plurality of word line voltages to be applied to the word lines, and
• a control logic configured to control a voltage generating operation of the voltage generating unit,
• wherein the voltage generating unit includes a negative voltage generator which is configured to generate a first negative voltage, to discharge the first negative voltage, and to generate a second negative voltage via a negative charge pumping.

A word line voltage generating method of a flash memory device comprising:

• generating a program voltage using a positive voltage generator;
• generating a plurality of negative program verification voltages using a negative voltage generator;
• and
• generating at least one or more positive program verification voltages using the positive voltage generator,
• wherein said generating a plurality of negative program verification voltages comprises generating a negative program verification voltage having a high level prior to a negative program verification voltage having a low level.

A flash memory device comprising:

• a memory cell array including a plurality of flash memory cells disposed at intersections of a plurality of word lines and a plurality of bit lines;
• a voltage generating unit configured to generate a plurality of word line voltages to be applied to the word lines;
• and
• a control logic configured to control a voltage generating operation of the voltage generating unit,
• wherein the voltage generating unit generates a plurality of negative word line voltages sequentially from a negative word line voltage having a highest level to a negative word line voltage having a lowest level as program verification voltages during a programming verify operation.

A flash memory device comprising:

• a memory cell array including a plurality of flash memory cells disposed at intersections of a plurality of word lines and a plurality of bit lines;
• a voltage generating unit configured to generate a plurality of word line voltages to be applied to the word lines;
• and
• a control logic configured to control a voltage generating operation of the voltage generating unit,
• wherein the voltage generating unit generates two different negative word line voltages and a positive word line voltage in turn during a program verify operation.

A word line voltage generating method of a flash memory comprising:

• generating a first negative verification voltage via a negative charge pumping of a negative voltage generator;
• discharging an output of the negative voltage generator during a first discharge time;
• and
• generating a second negative verification voltage via a negative charge pumping of the negative voltage generator after the first discharge time,
• wherein the first discharge time is determined according to a voltage difference between the first negative verification voltage and the second negative verification voltage.

A verification voltage generating method of a flash memory device which includes a negative voltage generator, comprising:

• generating a first negative verification voltage via the negative voltage generator;
• discharging an output of the negative voltage generator during a first discharge time;
• generating a second negative verification voltage higher than the first negative verification voltage via the negative voltage generator;
• discharging an output of the negative voltage generator during a second discharge time;
• and
• generating a third negative verification voltage higher than the second negative verification voltage via the negative voltage generator.

A verification voltage generating method of a flash memory comprising:

• generating a first negative verification voltage via a negative charge pumping operation of a negative voltage generator;
• and
• generating a second negative verification voltage higher than the first negative verification voltage without the negative charge pumping operation,
• wherein the second negative verification voltage is set up according to a discharge of the negative voltage generator.

A verification voltage generating method of a flash memory device which includes a positive voltage generator and a negative voltage generator, comprising:

• generating a negative verification voltage using the negative voltage generator;
• discharging an output of the negative voltage generator to a ground level;
• and
• generating a positive verification voltage via a positive charge pumping operation of the positive voltage generator.

A flash memory device comprising:

• a memory cell array including a plurality of flash memory cells disposed at intersections of a plurality of word lines and a plurality of bit lines;
• a voltage generating unit configured to generate a plurality of word line voltages to be applied to the word lines;
• and
• a control logic configured to control a voltage generating operation of the voltage generating unit,
• wherein the voltage generating unit discharges a first negative voltage during a discharge time and then generates a second negative voltage higher than the first negative voltage, and
• wherein the discharge time is determined according to a voltage difference between the first negative voltage and the second negative voltage.

A data storage device comprising:

• a plurality of flash memories connected with a plurality of channels;
• and
• a controller configured to control read, write, and erase operations of each of the plurality of flash memories via corresponding channels,
• wherein each of the plurality of flash memories comprises
• a memory cell array including a plurality of flash memory cells disposed at intersections of a plurality of word lines and a plurality of bit lines,
• a voltage generating unit configured to generate a plurality of word line voltages to be applied to the word lines, and
• a control logic configured to control a voltage generating operation of the voltage generating unit,
• wherein the voltage generating unit includes a negative voltage generator, and
• wherein when a first negative voltage is generated and then a second negative voltage higher than the first negative voltage is generated, the negative voltage generator discharges an output terminal of the voltage generating unit during a discharge time determined according to a voltage difference between the first negative voltage and the second negative voltage, and then generates the second negative voltage.