Display device and driving circuit for display device
AssigneePanasonic Corporation
InventorsKazuhito Ito, Junji Takiguchi, Tooru Suyama
Life of this patent
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Abstract
A driving circuit for a display device for selectively outputting a driving voltage positive or negative with respect to a given reference voltage of the display device in accordance with an image signal, includes an input stage circuit; and an output stage circuit for outputting a driving voltage between a given high voltage and a first intermediate voltage or a driving voltage between a second intermediate voltage and a given low voltage in accordance with a pair of output stage control signals output from the input stage circuit.
Claims2
A driving circuit for a display device for selectively outputting a driving voltage positive or negative with respect to a given reference voltage of the display device in accordance with an image signal, comprising:
- an input stage circuit;
- and
- an output stage circuit for outputting a driving voltage between a given high voltage and the given reference voltage or a driving voltage between the given reference voltage and a given low voltage in accordance with a pair of output stage control signals output from the input stage circuit,
- wherein the output stage circuit includes:
- a high-voltage-side transistor and a low-voltage-side transistor connected in series to each other;
- a high-voltage-side voltage supplying circuit for selectively supplying the high voltage or the given reference voltage to the high-voltage-side transistor;
- and
- a low-voltage-side voltage supplying circuit for selectively supplying the given reference voltage or the low voltage to the low-voltage-side transistor, and
- the input stage circuit includes:
- a P-channel transistor and an N-channel transistor connected in parallel to each other and connected, at both ends thereof, respectively to control terminals of the high-voltage-side transistor and the low-voltage-side transistor;
- and
- a bias supplying circuit for applying bias voltages to control terminals of the P-channel transistor and the N-channel transistor, said bias voltages corresponding to:
- a first selection mode in which the high voltage is supplied to the high-voltage-side transistor and the reference voltage is supplied to the low-voltage-side transistor, and
- a second selection mode in which the reference voltage is supplied to the high-voltage-side transistor, and the low voltage is supplied to the low-voltage-side transistor, and
- wherein bias voltages of said first selection mode are different from bias voltages of said second selection mode.
Dependencies are inferred from the claim text.