Method and apparatus for generating a clock signal

A method for generating a clock signal for a functional logic module within an integrated circuit comprising oscillator circuitry, the method comprising:

• generating the clock signal by the oscillator circuitry including a plurality of propagation paths, and a multiplexer logic, wherein
• the clock signal comprises an output clock signal, and
• an output of the multiplexer logic being arranged to provide the output clock signal;
• and
• applying a transition signal to inputs of the plurality of propagation paths, wherein the multiplexer logic is arranged to receive as a control signal, the transition signal;
• performing an AND operation and an OR operation on outputs of the plurality of propagation paths, in response to the transition signal;
• multiplexing the results of said performing the AND operation and the OR operation to generate the output clock signal, in response to the transition signal;
• and
• causing the output clock signal of the oscillator circuitry to transition based on a propagation of the transition signal through at least one of the propagation paths.

An integrated circuit comprising:

• oscillator circuitry arranged to generate a clock signal for a functional logic module of the integrated circuit, wherein
• the clock signal comprises an output clock signal,
• the oscillator circuitry comprises a plurality of propagation paths and a multiplexer logic, wherein
• an output of the multiplexer logic being arranged to provide the output clock signal, and
• the oscillator circuitry is further configured to
• apply a transition signal to inputs of the plurality of propagation paths, said multiplexer logic arranged to receive as a control signal, the transition signal,
• wherein the transition signal comprising an inverse of the output clock signal, and
• cause the output clock signal to transition based on a propagation of the transition signal through a determined set of the propagation paths.

A method for generating a clock signal for a functional logic module within an integrated circuit comprising oscillator circuitry, the method comprising:

• generating a clock signal by the oscillator circuitry including a plurality of propagation paths, and a multiplexer logic, wherein
• the clock signal comprises an output clock signal, and
• an output of the multiplexer logic being arranged to provide the output clock signal;
• applying a transition signal to inputs of the plurality of propagation paths, wherein
• the multiplexer logic is arranged to receive as a control signal, the transition signal, wherein
• the transition signal comprising an inverse of the output clock signal;
• and
• causing the output clock signal of the oscillator circuitry to transition based on a propagation of the transition signal through at least one of the propagation paths.