Silicon-on-insulator high power amplifiers
AssigneePurdue Research Foundation
InventorsSaeed Mohammadi, Sultan R. Helmi, Jing-Hwa Chen, Andrew J. Robison
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Abstract
Illustrative embodiments of power amplifiers are disclosed. In one embodiment, a power amplifier includes a plurality of transistors formed on a silicon-on-insulator (SOI) substrate such that the plurality of transistors are each electrically isolated from one another within the SOI substrate. The power amplifier also includes a plurality of biasing networks, each biasing network being configured to dynamically bias at least one of the plurality of transistors. The plurality of transistors are electrically coupled in a series stack, with an output of the power amplifier being provided across the series stack.
Claims20
A power amplifier comprising:
- a plurality of transistors formed on a silicon-on-insulator (SOI) substrate such that the plurality of transistors are each electrically isolated from one another within the SOI substrate;
- and
- a plurality of biasing networks, each biasing network being configured to dynamically bias at least one of the plurality of transistors;
- wherein the plurality of transistors are electrically coupled in a series stack, an output of the power amplifier being provided across the series stack;
- and
- wherein at least one of the plurality of transistors is arranged in a common-gate configuration.
A power amplifier comprising:
- a plurality of transistors formed on a silicon-on-insulator (SOI) substrate such that the plurality of transistors are each electrically isolated from one another within the SOI substrate;
- and
- a plurality of biasing networks, each biasing network being configured to dynamically bias at least one of the plurality of transistors;
- wherein the plurality of transistors are electrically coupled in a series stack, an output of the power amplifier being provided across the series stack;
- and
- wherein at least two of the plurality of transistors are arranged as a cascode amplifier, at least one transistor of the cascode amplifier being arranged in a common-gate configuration.
A power amplifier comprising:
- a plurality of cascode amplifiers formed on a silicon-on-insulator (SOI) substrate, each of the plurality of cascode amplifiers including at least two transistors that are electrically isolated from one another within the SOI substrate, at least one transistor of each of the plurality of cascode amplifiers being arranged in a common-gate configuration;
- and
- a plurality of biasing networks, each biasing network being configured to dynamically bias the transistors of one of the plurality of cascode amplifiers;
- wherein the plurality of cascode amplifiers are electrically coupled in a series stack, an output of the power amplifier being provided across the series stack.
Dependencies are inferred from the claim text.