High-resolution phase interpolators

A method for generating a clock signal by interpolating between a phase of a first input clock signal and a phase of a second input clock signal, wherein the phase of the first input clock signal is earlier than the phase of the second input clock signal, the method comprising:

• generating a first output clock signal by interpolating between the phases of the first and second input clock signals using a first interpolation circuit;
• generating a second output clock signal by interpolating between the phases of the first and second input clock signals using a second interpolation circuit;
• and
• generating a third output clock signal by interpolating between phases of the first and second output clock signals using a third interpolation circuit
• wherein at least one of generating the first output clock signal and generating the second output clock signal comprises:
• detecting an arrival of an edge of the first input clock signal;
• in response to said detecting, switchably connecting a first current source to an output node to apply a first current to the output node and charge a capacitance of the output node, using only the first current, to a voltage level which is less than or equal to a switching threshold of a voltage comparator circuit;
• detecting an arrival of an edge of the second input clock signal;
• in response to said detecting, switchably connecting a second current source to the output node to apply a second current to the output node and charge the capacitance of the output node to a voltage level which exceeds the switching threshold of the voltage comparator circuit;
• and
• controlling the first current source to generate a first current having a variable magnitude that is selected to adjust a timing at which the capacitance on the output node is charged to a voltage level that exceeds the switching threshold of the voltage comparator circuit and thereby adjust a phase shift of the output clock signal output from the voltage comparator circuit.