Charge pump and active filter for a feedback circuit

A phase locked loop (PLL) in integrated circuit (IC) form, the PLL comprising:

• a phase frequency detector (PFD) coupled to receive an input clock and a local clock as inputs, the PFD to generate a pair of error signals comprising a first error signal and a second error signal, wherein the pulse widths of the first error signal and the second error signal are proportional respectively to the extent of lead and lag between the input clock and an output clock;
• a charge pump circuit to receive the first error signal and the second error signal, and to generate corresponding current pulses;
• a loop filter to perform low-pass filtering of the current pulses to generate a low-pass filtered signal;
• a voltage controlled oscillator (VCO) coupled to receive the low-pass filtered signal and to generate the output clock, the frequency of the output clock being proportional to the voltage level of the low-pass filtered signal;
• and
• a frequency divider to divide the frequency of the output clock to generate the local clock,
• wherein the loop filter comprises a first resistor and a first capacitor coupled in series, and a second capacitor coupled in parallel with the series combination of the first resistor and the first capacitor, the first resistor and the first capacitor determining a zero of the transfer function of the loop filter,
• wherein the charge pump circuit simultaneously injects a first current pulse at a first node of the loop filter and a second current pulse at a second node of the loop filter, wherein the second node is a junction of the first resistor and the first capacitor, wherein the polarity of the first current pulse is the opposite of the polarity of the second current pulse, and wherein the charge pump circuit includes second and third resistors selected to bear a ratio to one another such that, in the transfer function of the loop filter, a capacitance value of the second capacitor is multiplied by a predetermined amount that corresponds to said ratio;
• wherein the charge pump circuit comprises a first switch, a second switch, a third switch, a fourth switch, a fourth resistor and a fifth resistor, wherein the first switch is coupled between a first constant reference potential and the second resistor, wherein the second switch is coupled between a second constant reference potential and the fourth resistor, wherein the third switch is coupled between the first constant reference potential and the third resistor, and wherein the fifth switch is coupled between the second constant reference potential and the fifth resistor;
• and
• wherein the loop filter is an active filter, the second capacitor determining a pole of the transfer function of the active filter;
• and wherein the active filter further comprises:
• a common-mode voltage generator to generate a common-mode voltage;
• and
• an operational amplifier (OPAMP),
• wherein an inverting terminal of the OPAMP is coupled to the first node, a non-inverting terminal of the OPAMP is coupled to the common-mode voltage, and an output terminal of the OPAMP is coupled to the third node.