Signal transmission circuit and switch driving device using the same

A switch driving device, comprising:

• a signal transmission circuit comprising a level shifting circuit for individually performing level shifting on a first input signal and a second input signal, and outputting the shifted results as a first shifted signal and a second shifted signal respectively, wherein:
• the level shifting circuit is provided between a power source and a ground terminal with a first series circuit having a first switching element switched according to the first input signal and a resistor connected to the first switching element in series, and a second series circuit having a second switching element switched according to the second input signal and a resistor connected to the second switching element in series, and the first series circuit and the second series circuit are connected in parallel, and
• a voltage on the first series circuit is used as the first shifted signal, a voltage on the second series circuit is used as the second shifted signal, and the first shifted signal and the second shifted signal are separately output;
• the level shifting circuit further comprises a counter-current preventing portion for preventing a reverse current from flowing from the ground terminal toward the first series circuit and the second series circuit, wherein the counter-current preventing portion is a diode disposed between the ground terminal and the first series circuit and second series circuit;
• an RS flip-flop circuit to which the first shifted signal and the second shifted signal used as a set signal and a reset signal respectively are input;
• and
• a driver, for generating an output signal corresponding to an output of the RS flip-flop circuit, and supplying the output signal to a switch.

A signal transmission circuit, comprising:

• a level shifting circuit, for performing level shifting on pulse signals of both a first input signal and a second input signal, wherein the shifted pulse signals are separately used as a first shifted signal and a second shifted signal;
• and
• a filtering circuit, for implementing filtering processing on the first shifted signal and the second shifted signal, wherein
• the level shifting circuit is provided between a power source and a ground terminal with a first series circuit having a first switching element switched according to the first input signal and a resistor connected to the first switching element in series, and a second series circuit having a second switching element switched according to the second input signal and a resistor connected to the second switching element in series, and the first series circuit and the second series circuit are connected in parallel, and
• a voltage on the first series circuit is used as the first shifted signal, and a voltage on the second series circuit is used as the second shifted signal,
• the filtering circuit implements pulse termination delay processing on the first shifted signal to generate a mask signal corresponding to the second shifted signal, and implements pulse termination delay processing on the second shifted signal, to generate a mask signal corresponding to the first shifted signal, and
• during a pulse of the mask signal, filtering processing is performed by proceeding pulse elimination processing on the first shifted signal and the second shifted signal.

A switch driving device, comprising:

• a signal transmission circuit comprising;
• a level shifting circuit, for performing level shifting on pulse signals of both a first input signal and a second input signal, wherein the shifted pulse signals are separately used as a first shifted signal and a second shifted signal;
• a filtering circuit, for implementing filtering processing on the first shifted signal and the second shifted signal, wherein
• the level shifting circuit is provided between a power source and a ground terminal with a first series circuit having a first switching element switched according to the first input signal and a resistor connected to the first switching element in series, and a second series circuit having a second switching element switched according to the second input signal and a resistor connected to the second switching element in series, and the first series circuit and the second series circuit are connected in parallel, and
• a voltage on the first series circuit is used as the first shifted signal, and a voltage on the second series circuit is used as the second shifted signal,
• the filtering circuit implements pulse termination delay processing on the first shifted signal to generate a mask signal corresponding to the second shifted signal, and implements pulse termination delay processing on the second shifted signal, to generate a mask signal corresponding to the first shifted signal, and
• during a pulse of the mask signal, filtering processing is performed by proceeding pulse elimination processing on the first shifted signal and the second shifted signal;
• an RS flip-flop circuit to which the first shifted signal and the second shifted signal used as a set signal and a reset signal respectively are input, wherein the filtering processing is implemented on the first shifted signal and the second shifted signal;
• and
• a driver, for generating an output signal corresponding to an output of the RS flip-flop circuit, and supplying the output signal to a switch.

A signal transmission circuit, comprising:

• a level shifting circuit, for performing level shifting on pulse signals of both a first input signal and a second input signal, wherein the shifted pulse signals are separately used as a first shifted signal and a second shifted signal;
• and
• a filtering circuit, for implementing filtering processing on the first shifted signal and the second shifted signal, wherein
• the level shifting circuit is provided between a power source and a ground terminal with a first series circuit having a first switching element switched according to the first input signal and a resistor connected to the first switching element in series, and a second series circuit having a second switching element switched according to the second input signal and a resistor connected to the second switching element in series, and the first series circuit and the second series circuit are connected in parallel, and
• a voltage on the first series circuit is used as the first shifted signal, and a voltage on the second series circuit is used as the second shifted signal,
• the filtering circuit generates a mask signal corresponding to the second shifted signal based on the first shifted signal, and generates a mask signal corresponding to the first shifted signal based on the second shifted signal, and
• after pulse onset delay processing is implemented on the first shifted signal and the second shifted signal, filtering processing is performed by proceeding pulse elimination processing on the first shifted signal and the second shifted signal during a pulse of the mask signal.

A switch driving device, comprising:

• a signal transmission circuit comprising:
• a level shifting circuit, for performing level shifting on pulse signals of both a first input signal and a second input signal, wherein the shifted pulse signals are separately used as a first shifted signal and a second shifted signal;
• a filtering circuit, for implementing filtering processing on the first shifted signal and the second shifted signal, wherein
• the level shifting circuit is provided between a power source and a ground terminal with a first series circuit having a first switching element switched according to the first input signal and a resistor connected to the first switching element in series, and a second series circuit having a second switching element switched according to the second input signal and a resistor connected to the second switching element in series, and the first series circuit and the second series circuit are connected in parallel, and
• a voltage on the first series circuit is used as the first shifted signal, and a voltage on the second series circuit is used as the second shifted signal,
• the filtering circuit generates a mask signal corresponding to the second shifted signal based on the first shifted signal, and generates a mask signal corresponding to the first shifted signal based on the second shifted signal, and
• after pulse onset delay processing is implemented on the first shifted signal and the second shifted signal, filtering processing is performed by proceeding pulse elimination processing on the first shifted signal and the second shifted signal during a pulse of the mask signal;
• an RS flip-flop circuit to which the first shifted signal and the second shifted signal used as a set signal and a reset signal respectively are input, wherein the filtering processing is implemented on the first shifted signal and the second shifted signal;
• and
• a driver, for generating an output signal corresponding to an output of the RS flip-flop circuit, and supplying the output signal to a switch.

A switch driving device, comprising:

• a signal transmission circuit comprising:
• a level shifting circuit, for performing level shifting on pulse signals of both a first input signal and a second input signal, wherein the shifted pulse signals are separately used as a first shifted signal and a second shifted signal;
• a filtering circuit, for implementing filtering processing on the first shifted signal and the second shifted signal, wherein
• the level shifting circuit is provided between a power source and a ground terminal with a first series circuit having a first switching element switched according to the first input signal and a resistor connected to the first switching element in series, and a second series circuit having a second switching element switched according to the second input signal and a resistor connected to the second switching element in series, and the first series circuit and the second series circuit are connected in parallel, and
• a voltage on the first series circuit is used as the first shifted signal, and a voltage on the second series circuit is used as the second shifted signal,
• the filtering circuit generates a mask signal corresponding to the second shifted signal based on the first shifted signal, and generates a mask signal corresponding to the first shifted signal based on the second shifted signal, wherein the filtering circuit generates the mask signal corresponding to the second shifted signal by implementing pulse termination delay processing on the first shifted signal, and generates the mask signal corresponding to the first shifted signal by implementing pulse termination delay processing on the second shifted signal,
• after pulse onset delay processing is implemented on the first shifted signal and the second shifted signal, filtering processing is performed by proceeding pulse elimination processing on the first shifted signal and the second shifted signal during a pulse of the mask signal;
• an RS flip-flop circuit to which the first shifted signal and the second shifted signal used as a set signal and a reset signal respectively are input, wherein the filtering processing is implemented on the first shifted signal and the second shifted signal;
• and
• a driver, for generating an output signal corresponding to an output of the RS flip-flop circuit, and supplying the output signal to a switch.