Slew detection for high voltage isolation region
AssigneeTexas Instruments Incorporated
InventorsVictor Samuel Sinow, Bharath Balaji Kannan, Robert A. Neidorff
Life of this patent
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Abstract
A system includes control circuitry configured to provide one or more control pulses in response to a command signal, the one or more control pulses being communicated from the control circuitry to associated circuitry via a connection. A detector is configured to detect a disturbing signal that mitigates reception of the one or more control pulses via the connection. The command signal is controlled to cause the control circuitry to provide one or more additional control pulses when the disturbing signal is detected by the detector to improve a likelihood of the reception of the one or more control pulses via the connection.
Claims21
A system comprising:
- control circuitry configured to provide one or more control pulses in response to a command signal, the one or more control pulses being communicated from the control circuitry to associated circuitry via a connection;
- a detector configured to detect a disturbing signal that mitigates reception of the one or more control pulses via the connection, wherein the command signal is controlled to cause the control circuitry to provide one or more additional control pulses when the disturbing signal is detected by the detector to improve a likelihood of the reception of the one or more control pulses via the connection, wherein the control circuitry comprises a control field effect transistor (FET) coupled to high-side circuitry, the control FET having a parasitic capacitance through which the disturbing signal passes corresponding to a disturbing condition of a high voltage isolation region.
An integrated circuit (IC), comprising:
- a high voltage isolation region that comprises a high-side driver, the high-side driver having a driver output configured to provide a high-side voltage for driving a gate of an external transistor;
- and
- a low voltage region outside of the high voltage isolation region, the low voltage region comprising:
- a lateral double diffused metal-oxide-semiconductor (LDMOS) transistor coupled to transmit a signal from the low voltage region to the high voltage isolation region for controlling the high-side driver, the LDMOS transistor having a parasitic capacitance through which slew current passes during a slewing condition in the high voltage isolation region;
- a current source coupled in series with the LDMOS transistor for effecting current flow through the LDMOS transistor in response to a control signal;
- and
- a slew detector configured to provide a slew detection signal based on the slew current passing through the parasitic capacitance.
A method for controlling a power device comprising:
- generating one or more control pulses in a control circuit separate from the power device in response to a command signal, the one or more control pulses being communicated via a connection for controlling the power device;
- detecting in a detection circuit a disturbing condition associated with the connection that mitigates reception of the one or more control pulses via the connection by utilizing a parasitic capacitance of a control FET through which the disturbing signal passes;
- and
- controlling the command signal in response the detection of the disturbing condition so that one or more additional control pulses are generated during the disturbing condition to thereby increase likelihood of reception of the one or more control pulses via the connection.
Dependencies are inferred from the claim text.