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US 8,558,566 B2Granted
Exclusive-option chips and methods with all-options-active test mode
AssigneeSanDisk Technologies LLC
InventorsPo-Shen Lai, Paul A. Lassa, Paul C. Paternoster
Life of this patent
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Abstract
A multi-interface integrated circuit in which, during the chip's lifetime in use, only one interface is active at a time. However, special test logic powers up all of the on-chip interface modules at once, so that a complete test cycle can be performed. All of the interfaces are exercised in one test program. Since some pads are inactive in some interface modes, mask bits are used to select which pads are monitored during which test cycles.
Claims10
A nonvolatile memory control integrated circuit comprising:
- a dedicated interface to nonvolatile memory, and memory control circuitry which provides controlled secure access to the memory;
- and
- multiple host interface modules, which are configured so that:
- each can provide interface between said control circuitry and an external interface, and
- only one of said interface modules can be active during normal operation of the chip;
- and
- test control logic, which allows multiple ones of said interface modules to be powered up during a special test mode, which is not activated during normal operation of the chip;
- whereby said controller can operate a complete memory unit in a selected one of multiple interface modes.
5 more elements
Dependencies are inferred from the claim text.