Semiconductor device

A semiconductor device comprising:

• (a) a substrate including an upper surface having a first substrate side, a second substrate side facing to the first substrate side, a third substrate side crossing to the first and second substrate sides, and a fourth substrate side facing to the third substrate side, a plurality of first conductive pads formed over the upper surface, a plurality of second conductive pads formed over the upper surface, a plurality of wirings electrically connecting the first conductive pads with the second conductive pads, and a lower surface opposite to the upper surface;
• (b) a microcomputer chip including a microcomputer front surface having a first microcomputer chip side, a second microcomputer chip side facing to the first microcomputer side, a third microcomputer chip side crossing to the first and second microcomputer chip sides, and a fourth microcomputer chip side facing to the third microcomputer chip side, a plurality of first microcomputer electrode pads formed over the microcomputer surface and arranged along the first, third, and fourth microcomputer chip sides, a plurality of second microcomputer electrode pads formed over the microcomputer surface and arranged along the second microcomputer chip side, and a microcomputer back surface opposite to the microcomputer front surface, and mounted on the upper surface of the substrate such that the microcomputer back surface faces to the substrate, and that each of the first and second conductive pads is exposed, and that the first microcomputer chip side is adjacent to the first substrate side, and that the third microcomputer chip side is adjacent to the third substrate side;
• (c) a first memory chip including a first memory front surface having a first memory chip side, a second memory chip side facing to the first memory chip side, a third memory chip side crossing to the first and second memory chip sides, and a fourth memory chip side facing to the third memory chip side, a plurality of first memory electrode pads formed over the first memory surface and arranged along the first memory chip side, a plurality of second memory electrode pads formed over the first memory surface and arranged along the second memory chip side, and a first memory back surface opposite to the first memory surface, and mounting adjacent to the microcomputer chip such that the first memory back surface faces to the substrate, and that each of the first and second conductive pads is exposed, and that the third memory chip side is adjacent to the first substrate side, and that the second memory chip side is adjacent to the third substrate side, and that a spacing between the third memory chip side and the first substrate side is smaller than a spacing between the first microcomputer chip side and the first substrate side, and that a spacing between the second memory chip side and the third substrate side is smaller than a spacing between the third microcomputer ship side and the third substrate side;
• (d) a plurality of first wires electrically connecting the plurality of first and second microcomputer electrode pads with the first conductive pads, respectively;
• and
• (e) a plurality of second wires electrically connecting the first and second memory electrode pads with the second conductive pads, respectively,
• wherein, in the plan view, the first conductive pads are arranged along the first, second, third, and fourth microcomputer chip sides of the microcomputer chip, respectively,
• wherein, in the plan view, the second conductive pads are arranged along the first and second memory chip sides of the memory chip, respectively,
• wherein each of the first microcomputer electrode pads formed in the microcomputer chip and the first memory electrode pads formed in the first memory chip has a data system electrode pad,
• wherein each of the second microcomputer electrode pads formed in the microcomputer chip and the second memory electrode pads formed in the first memory chip has a command/address system electrode pad,
• wherein the first data system conductive pads of the first conductive pads formed over the substrate electrically connected to the first microcomputer electrode pads of the microcomputer chip via the first wire are arranged along the first, third, and fourth microcomputer chip sides of the microcomputer chip, respectively, and
• wherein the second data system conductive pads of the second conductive pads formed over the substrate electrically connected to the first memory electrode pads of the first memory chip via the second wire are arranged along the first memory chip side of the memory chip.